An Investigation of Minimum Supply Voltage of 5-nm SRAM From 300 K Down to 10 K

An Investigation of Minimum Supply Voltage of 5-nm SRAM From 300 K Down to 10 K

In this article, we present a comprehensive study of the impact of cryogenic temperatures on the minimum operating voltage (<inline-formula> <tex-math notation="LaTeX">$V_{\min }$ </tex-math></inline-formula>) of 5-nm Fin Field-Effect Transistors (FinFETs)-based Sta...

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Bibliographic Details
Main Authors: Hafeez Raza, Shivendra Singh Parihar, Yogesh Singh Chauhan, Hussam Amrouch, Avinash Lahgere
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Subjects:
5 nm
characterization
cryogenic
FinFET
reliability
SRAM
Online Access:https://ieeexplore.ieee.org/document/10963695/
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Summary:In this article, we present a comprehensive study of the impact of cryogenic temperatures on the minimum operating voltage (<inline-formula> <tex-math notation="LaTeX">$V_{\min }$ </tex-math></inline-formula>) of 5-nm Fin Field-Effect Transistors (FinFETs)-based Static Random Access Memory (SRAM) cells. To perform the SRAM <inline-formula> <tex-math notation="LaTeX">$V_{\min }$ </tex-math></inline-formula> evaluation, we have measured the FinFETs fabricated using a commercial 5-nm technology down to 10 K. Next, we calibrate a cryogenic-aware BSIM-CMG FinFET compact model, which we use with our SRAM evaluation framework. For a comprehensive study, we evaluate three industry-standard SRAM cell types: 1) high-density cell (HDC); 2) low-voltage cell (LVC); and 3) high-performance cell (HPC). We analyze the impact of the threshold voltage (<inline-formula> <tex-math notation="LaTeX">$V_{\text {TH}}$ </tex-math></inline-formula>) and gate length (<inline-formula> <tex-math notation="LaTeX">$L_{G}$ </tex-math></inline-formula>)-only variations on the SRAM noise resilience. At cryogenic temperature, minimum read voltage (<inline-formula> <tex-math notation="LaTeX">$V_{\min ,R}$ </tex-math></inline-formula>) =0.15 V (62% decrease from room temperature) and minimum write voltage (<inline-formula> <tex-math notation="LaTeX">$V_{\min ,W}$ </tex-math></inline-formula>) =0.45 V are achieved without read-/write-assist circuits. We also highlight that the LVC provides the best tradeoff for <inline-formula> <tex-math notation="LaTeX">$V_{\min }$ </tex-math></inline-formula> between read and write operations for low-power cryogenic applications.
ISSN:2329-9231

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