Buried power rail to suppress substrate leakage in complementary field effect transistor (CFET)
In the pursuit of minimizing the track height in standard cell, a design innovation incorporating complementary field-effect transistors (CFETs) and Buried Power Rail (BPR) technology has been introduced. As the track height in conventional standard cells scales down to 3-track standard cell, the di...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
IOP Publishing
2024-01-01
|
| Series: | Nano Express |
| Subjects: | |
| Online Access: | https://doi.org/10.1088/2632-959X/ada0ce |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|