Realization of 10bit, 200MHz sampling frequency CMOS video D/A converter with gradient error compensation
A circuit of 10bit,200MHz sampling frequency current steering DAC with hierarchical symmetrical switching sequences was presented,which compensate the gradient error.The DAC employs segmented architecture.An integral linearity error caused by error distributes of current sources was reduced by a new...
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| Main Authors: | , , , |
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| Format: | Article |
| Language: | zho |
| Published: |
Editorial Department of Journal on Communications
2007-01-01
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| Series: | Tongxin xuebao |
| Subjects: | |
| Online Access: | http://www.joconline.com.cn/zh/article/74658433/ |
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| Summary: | A circuit of 10bit,200MHz sampling frequency current steering DAC with hierarchical symmetrical switching sequences was presented,which compensate the gradient error.The DAC employs segmented architecture.An integral linearity error caused by error distributes of current sources was reduced by a new switching sequence called "hierarchi-cal symmetrical switching".The DAC was built in a video-rate adaptive equalizer IC,which was fabricated in a 0.35μm,3.3V CMOS process.The area of DAC is 1.26mm×0.78mm.When operating at 14.318 MHz（4Fsc） sampling freguency,the effective numbers of bits is 9.3.Both the integral and the differential linearity errors are less than ± 0.5LSB. |
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| ISSN: | 1000-436X |