A Multiplier-Less Discrete Cosine Transform Architecture Using a Majority Logic-Based Approximate Full Adder
This paper proposes a new approximate full adder (FA) based on the majority logic (ML) concept. The fundamental structure of the ML concept is a 3-input majority voter and is widely utilized in digital arithmetic cells. The ML-based proposed FA works at low power, small delay, and low power-delay-pr...
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| Main Authors: | , , |
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| Format: | Article |
| Language: | fas |
| Published: |
Islamic Azad University Bushehr Branch
2024-03-01
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| Series: | مهندسی مخابرات جنوب |
| Subjects: | |
| Online Access: | https://sanad.iau.ir/journal/jce/Article/869992 |
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