Topology optimization of analog circuit design via global optimization using factorization machines with digital annealer
This study delves into the automatic analog circuit design, focusing primarily on topology optimization. Many real-world calculations and evaluations often involve complex and nonlinear problems, posing significant challenges in optimization. Obtaining characteristic values using a simulator can req...
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| Format: | Article |
| Language: | English |
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The Japan Society of Mechanical Engineers
2024-10-01
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| Series: | Journal of Advanced Mechanical Design, Systems, and Manufacturing |
| Subjects: | |
| Online Access: | https://www.jstage.jst.go.jp/article/jamdsm/18/6/18_2024jamdsm0076/_pdf/-char/en |
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| _version_ | 1846150975500320768 |
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| author | Masaharu HIDA Hiroshi IKEDA Akito MARUO Masaru SATO Takashi YAMAZAKI |
| author_facet | Masaharu HIDA Hiroshi IKEDA Akito MARUO Masaru SATO Takashi YAMAZAKI |
| author_sort | Masaharu HIDA |
| collection | DOAJ |
| description | This study delves into the automatic analog circuit design, focusing primarily on topology optimization. Many real-world calculations and evaluations often involve complex and nonlinear problems, posing significant challenges in optimization. Obtaining characteristic values using a simulator can require significant computational resources, adding to the complexity of these issues. In this paper, we employ an innovative optimization method that employs a factorization machine with a digital annealer (FM-DA) and a genetic algorithm (GA). The result is a global optimization method that integrates local optimization structures into its framework. FM-DA&GA represents a black-box optimization technique, where the input variables are expressed as binary variables. The optimization process is then performed using factorization machines that predict characteristic data. This method has been proven to be highly effective for topology optimization in the design of analog circuits. Furthermore, this method can produce a structure with excellent optimization performance at a less computational cost owing to the use of global optimization. |
| format | Article |
| id | doaj-art-a0fbee23418c48098bd9a121e40fcc89 |
| institution | Kabale University |
| issn | 1881-3054 |
| language | English |
| publishDate | 2024-10-01 |
| publisher | The Japan Society of Mechanical Engineers |
| record_format | Article |
| series | Journal of Advanced Mechanical Design, Systems, and Manufacturing |
| spelling | doaj-art-a0fbee23418c48098bd9a121e40fcc892024-11-28T05:20:32ZengThe Japan Society of Mechanical EngineersJournal of Advanced Mechanical Design, Systems, and Manufacturing1881-30542024-10-01186JAMDSM0076JAMDSM007610.1299/jamdsm.2024jamdsm0076jamdsmTopology optimization of analog circuit design via global optimization using factorization machines with digital annealerMasaharu HIDA0Hiroshi IKEDA1Akito MARUO2Masaru SATO3Takashi YAMAZAKI4Optimization Technology Project, Quantum Laboratory, Fujitsu LimitedOptimization Technology Project, Quantum Laboratory, Fujitsu LimitedTechnology Insight Dep., Global Business Quality Management Office, Fujitsu LimitedAdvanced Sensor Devices Project, Device & Materials Research Center, Fujitsu LimitedOptimization Technology Project, Quantum Laboratory, Fujitsu LimitedThis study delves into the automatic analog circuit design, focusing primarily on topology optimization. Many real-world calculations and evaluations often involve complex and nonlinear problems, posing significant challenges in optimization. Obtaining characteristic values using a simulator can require significant computational resources, adding to the complexity of these issues. In this paper, we employ an innovative optimization method that employs a factorization machine with a digital annealer (FM-DA) and a genetic algorithm (GA). The result is a global optimization method that integrates local optimization structures into its framework. FM-DA&GA represents a black-box optimization technique, where the input variables are expressed as binary variables. The optimization process is then performed using factorization machines that predict characteristic data. This method has been proven to be highly effective for topology optimization in the design of analog circuits. Furthermore, this method can produce a structure with excellent optimization performance at a less computational cost owing to the use of global optimization.https://www.jstage.jst.go.jp/article/jamdsm/18/6/18_2024jamdsm0076/_pdf/-char/enfactorization machinesdigital annealeranalog circuittopology optimizationglobal optimization |
| spellingShingle | Masaharu HIDA Hiroshi IKEDA Akito MARUO Masaru SATO Takashi YAMAZAKI Topology optimization of analog circuit design via global optimization using factorization machines with digital annealer Journal of Advanced Mechanical Design, Systems, and Manufacturing factorization machines digital annealer analog circuit topology optimization global optimization |
| title | Topology optimization of analog circuit design via global optimization using factorization machines with digital annealer |
| title_full | Topology optimization of analog circuit design via global optimization using factorization machines with digital annealer |
| title_fullStr | Topology optimization of analog circuit design via global optimization using factorization machines with digital annealer |
| title_full_unstemmed | Topology optimization of analog circuit design via global optimization using factorization machines with digital annealer |
| title_short | Topology optimization of analog circuit design via global optimization using factorization machines with digital annealer |
| title_sort | topology optimization of analog circuit design via global optimization using factorization machines with digital annealer |
| topic | factorization machines digital annealer analog circuit topology optimization global optimization |
| url | https://www.jstage.jst.go.jp/article/jamdsm/18/6/18_2024jamdsm0076/_pdf/-char/en |
| work_keys_str_mv | AT masaharuhida topologyoptimizationofanalogcircuitdesignviaglobaloptimizationusingfactorizationmachineswithdigitalannealer AT hiroshiikeda topologyoptimizationofanalogcircuitdesignviaglobaloptimizationusingfactorizationmachineswithdigitalannealer AT akitomaruo topologyoptimizationofanalogcircuitdesignviaglobaloptimizationusingfactorizationmachineswithdigitalannealer AT masarusato topologyoptimizationofanalogcircuitdesignviaglobaloptimizationusingfactorizationmachineswithdigitalannealer AT takashiyamazaki topologyoptimizationofanalogcircuitdesignviaglobaloptimizationusingfactorizationmachineswithdigitalannealer |