Ultra‐low‐power, high PSRR CMOS voltage reference with negative feedback

Ultra‐low‐power, high PSRR CMOS voltage reference with negative feedback

Based on negative feedback technique, a complementary metal–oxide semiconductor (CMOS) voltage reference with ultra‐low‐power, low supply voltage and high‐power supply rejection ratio (PSRR) is proposed and simulated using a 0.18 standard micrometre CMOS technology. The operating supply voltage rang...

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Bibliographic Details
Main Authors: Yanhan Zeng, Yuao Li, Xin Zhang, Hong‐Zhou Tan
Format: Article
Language:English
Published: Wiley 2017-11-01
Series:IET Circuits, Devices and Systems
Subjects:
ultra-low-power high PSRR CMOS voltage reference
negative feedback technique
complementary metal–oxide semiconductor
low supply voltage
high-power supply rejection ratio
standard micrometre CMOS technology
Online Access:https://doi.org/10.1049/iet-cds.2016.0452
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https://doi.org/10.1049/iet-cds.2016.0452

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