NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution
Soft processors often use data caches to reduce the gap between processor and main memory speeds. To achieve high efficiency, simple, blocking caches are used. Such caches are not appropriate for processor designs such as Runahead and out-of-order execution that require nonblocking caches to tolera...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2012-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2012/915178 |
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