Simulation Analysis and Optimization of Board-Level Power Integrity Based on PDN Impedance
As integrated circuit (IC) chips evolve toward high speed, high density, low voltage, and high current, ensuring power integrity (PI) has become increasingly prominent. Inadequate power integrity design can lead to deviations from the ideal performance even with more decoupling capacitors. This pape...
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| Main Authors: | , , |
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| Format: | Article |
| Language: | zho |
| Published: |
Editorial Office of Control and Information Technology
2024-10-01
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| Series: | Kongzhi Yu Xinxi Jishu |
| Subjects: | |
| Online Access: | http://ctet.csrzic.com/thesisDetails#10.13889/j.issn.2096-5427.2024.05.017 |
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