Generating Efficient Instruction Sequence for Software-Based Self-Testing of Processor Cores Using Reinforcement Learning
As the prevalence of faulty chips increases post-deployment, effective in-field testing is imperative. This paper introduces a novel approach for generating software-based self-test (SBST) programs for processor cores using reinforcement learning (RL). We employ toggle coverage as a proxy metric to...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2024-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10794784/ |
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