Port Contention Aware Task Scheduling for SIMD Applications

Single instruction multiple data (SIMD) instructions in central processing units (CPU) are becoming commonly used in usecases such as wireless signal processing and artificial intelligence (AI) inference. When SIMD operations are executed in a simultaneous multi-threading (SMT) environment, a perfor...

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Bibliographic Details
Main Authors: Shogo Saito, Kei Fujimoto
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10816398/
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Summary:Single instruction multiple data (SIMD) instructions in central processing units (CPU) are becoming commonly used in usecases such as wireless signal processing and artificial intelligence (AI) inference. When SIMD operations are executed in a simultaneous multi-threading (SMT) environment, a performance degradation event, called port contention, is expected to occur due to the limited number of ports caused by the large size of the SIMD circuit. In this paper, we analyze the occurrence of port contention during SIMD operation and clarify the characteristics that affect the performance of core allocation. On the basis of these performance characteristics, we propose a system that avoids the occurrence of port contention and improves performance. The proposed method features a core allocation policy to avoid port contention, identify SIMD applications, and coordinate with the operating system (OS) scheduler. Through evaluation, we find that the proposed method can reduce the processing time for some tasks in virtual radio access networks was reduced by 13.3%.
ISSN:2169-3536