Dynamic Voltage Balancing Across Series-Connected 10 kV SiC JBS Diodes in Medium Voltage 3L-NPC Power Converter Having Snubberless Series-Connected 10 kV SiC MOSFETs
This article addresses the mitigation of dynamic voltage imbalance in series-connected 10 kV silicon carbide (SiC) JBS diodes within a three-level NPC (3L-NPC) converter using active turn-<sc>off</sc> delay control across complementary series-connected 10 kV SiC <sc>mosfet</sc&g...
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2024-01-01
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author | Sanket Parashar Nithin Kolli Raj Kumar Kokkonda Ajit Kanale Subhashish Bhattacharya Bantval Jayant Baliga |
author_facet | Sanket Parashar Nithin Kolli Raj Kumar Kokkonda Ajit Kanale Subhashish Bhattacharya Bantval Jayant Baliga |
author_sort | Sanket Parashar |
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description | This article addresses the mitigation of dynamic voltage imbalance in series-connected 10 kV silicon carbide (SiC) JBS diodes within a three-level NPC (3L-NPC) converter using active turn-<sc>off</sc> delay control across complementary series-connected 10 kV SiC <sc>mosfet</sc>s. The implementation of active turn-<sc>off</sc> delay control in SiC <sc>mosfet</sc>s eliminates the need for passive <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubbers, which otherwise increase the switching <inline-formula><tex-math notation="LaTeX">$dv/dt$</tex-math></inline-formula> mismatch and snubber current across the diodes. In addition, parasitic base-plate capacitance across <sc>mosfet</sc>s and diodes, along with parasitic bus bar and snubber inductance in the commutation path, contribute to turn-<sc>off</sc> voltage mismatch and snubber loss in series-connected 10 kV SiC JBS diodes. The mismatch in nonlinear capacitance of series-connected devices (<sc>mosfet</sc>s and diodes) and the nonlinear <sc>mosfet</sc> <inline-formula><tex-math notation="LaTeX">$i$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$-$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$v_{gs}$</tex-math></inline-formula> curve affect the turn-<sc>on</sc> and turn-<sc>off</sc> voltage transitions between complementary switching <sc>mosfet</sc>s and diodes, leading to variations in turn-<sc>off</sc> voltage mismatch and snubber losses. The 3L-NPC converter has eight types of switching transition, complicating the analysis of <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber design. This complexity is further increased by nonlinear device parameters, parasitic capacitance, and inductance in the commutation path for each of the eight 10 kV SiC <sc>mosfet</sc>s and four 10 kV SiC JBS diodes. To address these challenges, this research develops a mathematical model for the switching transition between 10 kV SiC <sc>mosfet</sc>s and complementary 10 kV SiC JBS diodes in a two-level clamped inductive switching (CIS) test setup. The model considers the effects of parasitic base-plate capacitance and the absence of an <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber due to active turn-<sc>off</sc> delay control across series-connected SiC <sc>mosfet</sc>s. Subsequently, the mathematical model is refined using an iterative algorithm to account for mismatches in nonlinear device capacitance of <sc>mosfet</sc>s and diodes, as well as the nonlinear <inline-formula><tex-math notation="LaTeX">$i$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$-$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$v_{gs}$</tex-math></inline-formula> curve of <sc>mosfet</sc>s during the switching transition of the diode. This refined model is then used to design the <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber for series-connected 10 kV SiC JBS diodes and to optimize the turn-<sc>on</sc> gate resistance of complementary 10 kV SiC <sc>mosfet</sc>s on two-level CIS test benches (TB1 and TB2). Following this, the design parameters are systematically adjusted using experimental results from 3L-NPC test benches 3 to 5. This article provides simplified steps for the design and analysis of the <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber in various test benches, validated by experimental data. The 3L-NPC converter with the final <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber design achieved 99.2% efficiency and a 35 V turn-<sc>off</sc> voltage mismatch. The maximum error between the theoretical model and experimental data is 4.8%. |
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institution | Kabale University |
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spelling | doaj-art-300bbb648f6c4b02ae88fa871978a5ef2025-01-17T00:01:12ZengIEEEIEEE Open Journal of the Industrial Electronics Society2644-12842024-01-0151058108410.1109/OJIES.2024.345050910652239Dynamic Voltage Balancing Across Series-Connected 10 kV SiC JBS Diodes in Medium Voltage 3L-NPC Power Converter Having Snubberless Series-Connected 10 kV SiC MOSFETsSanket Parashar0https://orcid.org/0000-0002-2308-103XNithin Kolli1https://orcid.org/0000-0001-7437-517XRaj Kumar Kokkonda2https://orcid.org/0000-0001-8422-9635Ajit Kanale3https://orcid.org/0000-0003-2274-3617Subhashish Bhattacharya4https://orcid.org/0000-0001-9311-5744Bantval Jayant Baliga5https://orcid.org/0000-0001-9171-0080Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC, USADepartment of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC, USADepartment of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC, USADepartment of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC, USADepartment of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC, USADepartment of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC, USAThis article addresses the mitigation of dynamic voltage imbalance in series-connected 10 kV silicon carbide (SiC) JBS diodes within a three-level NPC (3L-NPC) converter using active turn-<sc>off</sc> delay control across complementary series-connected 10 kV SiC <sc>mosfet</sc>s. The implementation of active turn-<sc>off</sc> delay control in SiC <sc>mosfet</sc>s eliminates the need for passive <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubbers, which otherwise increase the switching <inline-formula><tex-math notation="LaTeX">$dv/dt$</tex-math></inline-formula> mismatch and snubber current across the diodes. In addition, parasitic base-plate capacitance across <sc>mosfet</sc>s and diodes, along with parasitic bus bar and snubber inductance in the commutation path, contribute to turn-<sc>off</sc> voltage mismatch and snubber loss in series-connected 10 kV SiC JBS diodes. The mismatch in nonlinear capacitance of series-connected devices (<sc>mosfet</sc>s and diodes) and the nonlinear <sc>mosfet</sc> <inline-formula><tex-math notation="LaTeX">$i$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$-$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$v_{gs}$</tex-math></inline-formula> curve affect the turn-<sc>on</sc> and turn-<sc>off</sc> voltage transitions between complementary switching <sc>mosfet</sc>s and diodes, leading to variations in turn-<sc>off</sc> voltage mismatch and snubber losses. The 3L-NPC converter has eight types of switching transition, complicating the analysis of <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber design. This complexity is further increased by nonlinear device parameters, parasitic capacitance, and inductance in the commutation path for each of the eight 10 kV SiC <sc>mosfet</sc>s and four 10 kV SiC JBS diodes. To address these challenges, this research develops a mathematical model for the switching transition between 10 kV SiC <sc>mosfet</sc>s and complementary 10 kV SiC JBS diodes in a two-level clamped inductive switching (CIS) test setup. The model considers the effects of parasitic base-plate capacitance and the absence of an <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber due to active turn-<sc>off</sc> delay control across series-connected SiC <sc>mosfet</sc>s. Subsequently, the mathematical model is refined using an iterative algorithm to account for mismatches in nonlinear device capacitance of <sc>mosfet</sc>s and diodes, as well as the nonlinear <inline-formula><tex-math notation="LaTeX">$i$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$-$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$v_{gs}$</tex-math></inline-formula> curve of <sc>mosfet</sc>s during the switching transition of the diode. This refined model is then used to design the <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber for series-connected 10 kV SiC JBS diodes and to optimize the turn-<sc>on</sc> gate resistance of complementary 10 kV SiC <sc>mosfet</sc>s on two-level CIS test benches (TB1 and TB2). Following this, the design parameters are systematically adjusted using experimental results from 3L-NPC test benches 3 to 5. This article provides simplified steps for the design and analysis of the <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber in various test benches, validated by experimental data. The 3L-NPC converter with the final <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber design achieved 99.2% efficiency and a 35 V turn-<sc>off</sc> voltage mismatch. The maximum error between the theoretical model and experimental data is 4.8%.https://ieeexplore.ieee.org/document/10652239/10 kV silicon carbide (SiC) JBS diodes10 kV SiC <sc xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">mosfet</sc>sactive turn-<sc xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">off</sc> delay controlbase-plate capacitancemedium voltagepower conditioning system |
spellingShingle | Sanket Parashar Nithin Kolli Raj Kumar Kokkonda Ajit Kanale Subhashish Bhattacharya Bantval Jayant Baliga Dynamic Voltage Balancing Across Series-Connected 10 kV SiC JBS Diodes in Medium Voltage 3L-NPC Power Converter Having Snubberless Series-Connected 10 kV SiC MOSFETs IEEE Open Journal of the Industrial Electronics Society 10 kV silicon carbide (SiC) JBS diodes 10 kV SiC <sc xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">mosfet</sc>s active turn-<sc xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">off</sc> delay control base-plate capacitance medium voltage power conditioning system |
title | Dynamic Voltage Balancing Across Series-Connected 10 kV SiC JBS Diodes in Medium Voltage 3L-NPC Power Converter Having Snubberless Series-Connected 10 kV SiC MOSFETs |
title_full | Dynamic Voltage Balancing Across Series-Connected 10 kV SiC JBS Diodes in Medium Voltage 3L-NPC Power Converter Having Snubberless Series-Connected 10 kV SiC MOSFETs |
title_fullStr | Dynamic Voltage Balancing Across Series-Connected 10 kV SiC JBS Diodes in Medium Voltage 3L-NPC Power Converter Having Snubberless Series-Connected 10 kV SiC MOSFETs |
title_full_unstemmed | Dynamic Voltage Balancing Across Series-Connected 10 kV SiC JBS Diodes in Medium Voltage 3L-NPC Power Converter Having Snubberless Series-Connected 10 kV SiC MOSFETs |
title_short | Dynamic Voltage Balancing Across Series-Connected 10 kV SiC JBS Diodes in Medium Voltage 3L-NPC Power Converter Having Snubberless Series-Connected 10 kV SiC MOSFETs |
title_sort | dynamic voltage balancing across series connected 10 kv sic jbs diodes in medium voltage 3l npc power converter having snubberless series connected 10 kv sic mosfets |
topic | 10 kV silicon carbide (SiC) JBS diodes 10 kV SiC <sc xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">mosfet</sc>s active turn-<sc xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">off</sc> delay control base-plate capacitance medium voltage power conditioning system |
url | https://ieeexplore.ieee.org/document/10652239/ |
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