Efficient Implementation of DVI Protocol on FPGA by Sara Ershadi-Nasab, Danial Bayati, Saeed Yazdani

“…This paper presents a general-purpose hardware implementation of the digital visual interface (DVI) protocol on the Xilinx Virtex-6 ML605 FPGA platform for real-time display of digital processing results. …”
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Analysis of possibilities of FPGA-implementation for multiplication operations in the Galois field by E. V. Listopad

“…The variants of hardware implementations of multiplication operations in the Galois field are considered for efficient solution of the tasks of constructing specialized processors based on FPGA, meeting strict requirements for speed and nominal value of the working clock frequency. …”
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Implementation of Simplified Data Encryption Standard on FPGA using VHDL by salim Qadir Mohammed

“…The design is synthesized, compiled and implemented on the FPGA Altera board, which, consists Quartus II software environment, and Altera Cyclone IV 4CX150FPGA device. …”
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Next-generation ECC processor on FPGA: Leveraging Koblitz curves for enhanced performance by Tung Nguyen, Khai Nguyen, Vy Nguyen, Hung Nguyen, Linh Tran

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Implementation of the Subharmonic Compensation Algorithm Based on DSP+FPGA and Multiple Synchronous Rotating Coordinates by YIN Lujun, LI Yu, YAN Liangzhan

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A One-Dimensional Depthwise Separable Convolutional Neural Network for Bearing Fault Diagnosis Implemented on FPGA by Yu-Pei Liang, Hao Chen, Ching-Che Chung

“…This paper presents a hardware implementation of a one-dimensional convolutional neural network using depthwise separable convolution (DSC) on the VC707 FPGA development board. …”
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Direct Digital Synthesis Method and Implementation of Multi-component Signal by DENG Hong-yu, TONG Zi-quan, GAI Jian-xin, LI Zhuo-ran

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FPGA SoC Implementation of Adaptive Deep Neural Network-Based Multimodal Edge Intelligence for Internet of Medical Things by Nikhil B. Gaikwad, Smith K. Khare, Dinesh Mendhe, Hasan Mir, Sokol Kosta, U. Rajendra Acharya

“…Three versions of adaptive DNN IP cores (8-bit, 16-bit, 24-bit) are implemented on SoC/FPGA and compared together to study the effect of bit precision on accuracy, resource utilization, and power consumption. …”
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FPGA Implementation for 24.576-Gbit/s Optical PAM4 Signal Transmission with MLP-Based Digital Pre-Distortion by Sheng Hu, Tianqi Zheng, Chengzhen Bian, Xiongwei Yang, Xinda Sun, Zonghui Zhu, Yumeng Gou, Yuanxiao Meng, Jie Zhang, Jingtao Ge, Yichen Li, Kaihui Wang

“…In this work, an MLP-DPD scheme was implemented on a field-programmable gate array (FPGA). …”
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Implementation of the Semi-physical Simulation Platform for Photovoltaic Inverter by WANG Jian, XU Wei, ZHANG Jie

“…The hardware structure of CPU and FPGA was used to establish the simulation models of CPU and FPGA respectively. …”
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FPGA‐Based Design of Ultra‐Efficient Approximate Adders for High‐Fidelity Image Processing: A Logic‐Optimized Approach by Ramakrishna Reddy Eamani, N. Vinodhkumar, Ambe Harrison, Wulfran Fendzi Mbasso

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Analysis of application of FPGA technologies in IoT by Vitaliy Kulanov, Artem Perepelitsyn

“…The subject of study in this article and work is the modern technologies of programmable logic devices (PLD) classified as FPGA, and the peculiarities of its application in Internet-of-Things domain at different architectural layers of the implementation, as well as the elements of decision making during choosing of appropriate solutions based on FPGA in the context of implementation of IoT tasks with the requirements of intensive computations. …”
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A New 5-D Hyperchaotic System With a Line Equilibrium, Its Bifurcation Analysis, Circuit Simulation, FPGA Implementation, and Data Prediction Using Long-Term-Short Memory by Talal Bonny, Sundarapandian Vaidyanathan, Wafaa Al Nassan, Aceng Sambas, Fareh Hannachi, Maher Alrahhal, Chittineni Aruna

“…With the help of Multisim 14.0 circuit simulator, an electronic circuit design for the new 5-D hyperchaotic system with a line of equilibrium points has been constructed. Furthermore, an FPGA implementation of the proposed hyperchaotic system is performed by applying Forward Euler numerical methods using FPGA CYCLONE IV GX platform. …”
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Hardware Implementation for Triaxial Contact-Force Estimation from Stress Tactile Sensor Arrays: An Efficient Design Approach by María-Luisa Pinto-Salamanca, Wilson-Javier Pérez-Holguín, José A. Hidalgo-López

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ON FPGA BASED ACCELERATION OF IMAGE PROCESSING IN MOBILE ROBOTICS by Petr Cížek, Jan Faigl

“…The paper reports on performance evaluation of the CPU–based and FPGA–based implementations of a visual teach-and-repeat navigation system based on detection and tracking of the FAST image salient points. …”
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SIFO: Secure Computational Infrastructure Using FPGA Overlays by Xin Fang, Stratis Ioannidis, Miriam Leeser

“…We have designed and implemented SIFO: secure computational infrastructure using FPGA overlays. …”
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FPGA-accelerated mode decomposition for multimode fiber-based communication by Qian Zhang, Yuedi Zhang, Juergen Czarske

“…After quantizing the model’s parameters, the CNN is executed on an FPGA using fixed-point arithmetic. The results demonstrate that the FPGA-based neural network can accurately decompose up to six modes. …”
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Application of FPGA in the Control System of Volt-boost Static Var Generator by QIU Yuefeng, ZHANG Dinghua, LAN Deshao, TANG Jianyu

“…The design takes full advantages of FPGA in parallel computing and data handling to implement the base calculation of control software, so that the performance burden of multichannel high-precision calculation is decreased for DSP and the compensation of SVG is enhanced. …”
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A Fault Injection Analysis of Linux Operating on an FPGA-Embedded Platform by Joshua S. Monson, Mike Wirthlin, Brad Hutchings

“…An FPGA-based Linux test-bed was constructed for the purpose of measuring its sensitivity to single-event upsets. …”
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Application of Leap-forward LFSR Based on FPGA in Pseudo Random Sequence Algorithm by HAO Hongwei

“…This paper presented a leap-forward linear feedback register algorithm which used the leap-forward idea to improve shift register. The results of FPGA implementation show that the pseudo-random sequence generated by this algorithm satisfies the randomness of equalization, run-length and auto-correlation, and greatly improves the efficiency of output data.…”
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