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1
InMemQK: A Product Quantization Based MatMul Module for Compute-in-Memory Attention Macro
Published 2024-12-01Subjects: Get full text
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2
Union SRAM: PVT Variation Auto-Compensated, Bit Precision Configurable Current Mode 8T SRAM in Memory MAC Macro
Published 2024-01-01Subjects: “…SRAM compute-in-memory…”
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3
Logic-Compatible Embedded DRAM Architecture for Multifunctional Digital Storage and Compute-in-Memory
Published 2024-10-01Subjects: Get full text
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4
Approximation-Aware Training for Efficient Neural Network Inference on MRAM Based CiM Architecture
Published 2025-01-01Subjects: Get full text
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5
Recent Progress of Non-Volatile Memory Devices Based on Two-Dimensional Materials
Published 2024-09-01Subjects: Get full text
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6
SRAM and Mixed-Signal Logic With Noise Immunity in 3-nm Nano-Sheet Technology
Published 2025-01-01Subjects: “…Compute-in-memory (CIM)…”
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7
Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge Notches
Published 2025-01-01Subjects: “…Compute-in-memory (CIM) arrays…”
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8
Co-Optimization of Power Delivery Network Design for 3-D Heterogeneous Integration of RRAM-Based Compute In-Memory Accelerators
Published 2025-01-01Subjects: Get full text
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9
A High-Efficiency Charge-Domain Compute-in-Memory 1F1C Macro Using 2-bit FeFET Cells for DNN Processing
Published 2024-01-01Subjects: Get full text
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10
Capacitance and Conductance Compensation Methods for Efficient Computing‐In‐Memory Designs
Published 2024-12-01Subjects: Get full text
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11
Energy-efficient and fast memristor-based serial multipliers applicable in image processing
Published 2025-03-01Subjects: Get full text
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12
Ferroelectric Transistor-Based Synaptic Crossbar Arrays: The Impact of Ferroelectric Thickness and Device-Circuit Interactions
Published 2024-01-01Subjects: “…Computing-in-memory (CiM)…”
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13
Trends and Challenges in Computing-in-Memory for Neural Network Model: A Review From Device Design to Application-Side Optimization
Published 2024-01-01Subjects: Get full text
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14
Double MAC on a Cell: A 22-nm 8T-SRAM-Based Analog In-Memory Accelerator for Binary/Ternary Neural Networks Featuring Split Wordline
Published 2024-01-01Subjects: Get full text
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15
Accuracy Improvement With Weight Mapping Strategy and Output Transformation for STT-MRAM-Based Computing-in-Memory
Published 2024-01-01Subjects: Get full text
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16
MESO-CMOS Hybrid Circuits With Time-Multiplexing Technique for Energy and Area-Efficient Computing in Memory
Published 2025-01-01Subjects: Get full text
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