LIU, D., FENG, Y., DANG, X., TONG, D., CHENG, X., & WANG, K. Method for reducing the complexity of clock domain crossing design and its verification in system-on-chips. Editorial Department of Journal on Communications.
Chicago Style (17th ed.) CitationLIU, Dan, Yi FENG, Xiang-lei DANG, Dong TONG, Xu CHENG, and Ke-yi WANG. Method for Reducing the Complexity of Clock Domain Crossing Design and Its Verification in System-on-chips. Editorial Department of Journal on Communications.
MLA (9th ed.) CitationLIU, Dan, et al. Method for Reducing the Complexity of Clock Domain Crossing Design and Its Verification in System-on-chips. Editorial Department of Journal on Communications.
Warning: These citations may not always be 100% accurate.