Automated Generation of Custom Processor Core from C Code
We present a method for construction of application-specific processor cores from a given C code. Our approach consists of three phases. We start by quantifying the properties of the C code in terms of operation types, available parallelism, and other metrics. We then create an initial data path to...
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| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
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Wiley
2012-01-01
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| Series: | Journal of Electrical and Computer Engineering |
| Online Access: | http://dx.doi.org/10.1155/2012/862469 |
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| _version_ | 1841524812629934080 |
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| author | Jelena Trajkovic Samar Abdi Gabriela Nicolescu Daniel D. Gajski |
| author_facet | Jelena Trajkovic Samar Abdi Gabriela Nicolescu Daniel D. Gajski |
| author_sort | Jelena Trajkovic |
| collection | DOAJ |
| description | We present a method for construction of application-specific processor cores from a given C code. Our approach consists of three phases. We start by quantifying the properties of the C code in terms of operation types, available parallelism, and other metrics. We then create an initial data path to exploit the available parallelism. We then apply designer-guided constraints to an interactive data path refinement algorithm that attempts to reduce the number of the most expensive components while meeting the constraints. Our experimental results show that our technique scales very well with the size of the C code. We demonstrate the efficiency of our technique on wide range of applications, from standard academic benchmarks to industrial size examples like the MP3 decoder. Each processor core was constructed and refined in under a minute, allowing the designer to explore several different configurations in much less time than needed for manual design. We compared our selection algorithm to the manual selection in terms of cost/performance and showed that our optimization technique achieves better cost/performance trade-off. We also synthesized our designs with programmable controller and, on average, the refined core have only 23% latency overhead, twice as many block RAMs and 36% fewer slices compared to the respective manual designs. |
| format | Article |
| id | doaj-art-ecb006a30d6e4e188e73cb4019912853 |
| institution | Kabale University |
| issn | 2090-0147 2090-0155 |
| language | English |
| publishDate | 2012-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | Journal of Electrical and Computer Engineering |
| spelling | doaj-art-ecb006a30d6e4e188e73cb40199128532025-02-03T05:47:22ZengWileyJournal of Electrical and Computer Engineering2090-01472090-01552012-01-01201210.1155/2012/862469862469Automated Generation of Custom Processor Core from C CodeJelena Trajkovic0Samar Abdi1Gabriela Nicolescu2Daniel D. Gajski3Center for Embedded Computer Systems, University of California, Irvine CA 92697, USAElectrical and Computer Engineering Department, Concordia University, Montreal, QC, H4B 1R6, CanadaÉcole Polytechnique de Montréal, Montreal, QC, H3C 3A7, CanadaCenter for Embedded Computer Systems, University of California, Irvine CA 92697, USAWe present a method for construction of application-specific processor cores from a given C code. Our approach consists of three phases. We start by quantifying the properties of the C code in terms of operation types, available parallelism, and other metrics. We then create an initial data path to exploit the available parallelism. We then apply designer-guided constraints to an interactive data path refinement algorithm that attempts to reduce the number of the most expensive components while meeting the constraints. Our experimental results show that our technique scales very well with the size of the C code. We demonstrate the efficiency of our technique on wide range of applications, from standard academic benchmarks to industrial size examples like the MP3 decoder. Each processor core was constructed and refined in under a minute, allowing the designer to explore several different configurations in much less time than needed for manual design. We compared our selection algorithm to the manual selection in terms of cost/performance and showed that our optimization technique achieves better cost/performance trade-off. We also synthesized our designs with programmable controller and, on average, the refined core have only 23% latency overhead, twice as many block RAMs and 36% fewer slices compared to the respective manual designs.http://dx.doi.org/10.1155/2012/862469 |
| spellingShingle | Jelena Trajkovic Samar Abdi Gabriela Nicolescu Daniel D. Gajski Automated Generation of Custom Processor Core from C Code Journal of Electrical and Computer Engineering |
| title | Automated Generation of Custom Processor Core from C Code |
| title_full | Automated Generation of Custom Processor Core from C Code |
| title_fullStr | Automated Generation of Custom Processor Core from C Code |
| title_full_unstemmed | Automated Generation of Custom Processor Core from C Code |
| title_short | Automated Generation of Custom Processor Core from C Code |
| title_sort | automated generation of custom processor core from c code |
| url | http://dx.doi.org/10.1155/2012/862469 |
| work_keys_str_mv | AT jelenatrajkovic automatedgenerationofcustomprocessorcorefromccode AT samarabdi automatedgenerationofcustomprocessorcorefromccode AT gabrielanicolescu automatedgenerationofcustomprocessorcorefromccode AT danieldgajski automatedgenerationofcustomprocessorcorefromccode |