A New Heterostructure Junctionless Tunnel Field Effect Transistor with Silicon-on-Nothing Technique for DC Parameter Improvement

In this paper, a novel heterostructure junctionless tunnel field effect transistor with silicon-on-nothing technology (SON HS-JLTFET) is proposed. The proposed device has two advantages over conventional JLTFET. First, one decade of increment in the ON current is achieved and subthreshold swing is i...

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Main Authors: Amin Vanak, Amir Amini
Format: Article
Language:fas
Published: Semnan University 2024-04-01
Series:مجله مدل سازی در مهندسی
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Online Access:https://modelling.semnan.ac.ir/article_8360_a374f76599339e39f86d948a44b54647.pdf
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author Amin Vanak
Amir Amini
author_facet Amin Vanak
Amir Amini
author_sort Amin Vanak
collection DOAJ
description In this paper, a novel heterostructure junctionless tunnel field effect transistor with silicon-on-nothing technology (SON HS-JLTFET) is proposed. The proposed device has two advantages over conventional JLTFET. First, one decade of increment in the ON current is achieved and subthreshold swing is improved by 10%. In this device, InAs is used in the source region of SON HS-JLTFET which has a lower energy band gap than Si to achieve thinner tunneling barrier width. Hence, more electron can tunnel from source to channel. As a result, it provides improvements in drain current and subthreshold swing. The second advantage is that the ambipolar current reduction due to the use of SON technique. In fact, in this technique, air is considered as the gate dielectric which results in decrement in the electric field in the drain/channel junction. This reduced electric field causes increasing the width of the tunneling barrier which results in lower ambipolar current in the drain/channel junction..
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institution Kabale University
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2783-2538
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publishDate 2024-04-01
publisher Semnan University
record_format Article
series مجله مدل سازی در مهندسی
spelling doaj-art-e9f74ca5f50648ffa19f0f1b8db24bbe2025-01-15T08:14:58ZfasSemnan Universityمجله مدل سازی در مهندسی2008-48542783-25382024-04-012276455310.22075/jme.2023.29572.23928360A New Heterostructure Junctionless Tunnel Field Effect Transistor with Silicon-on-Nothing Technique for DC Parameter ImprovementAmin Vanak0Amir Amini1Doctoral student, Department of Electrical Engineering, College of Technical and Engineering, West Tehran Branch, Islamic Azad University, Tehran, Iran.Associate Professor, Department of Electrical Engineering, College of Technical and Engineering, West Tehran Branch, Islamic Azad University, Tehran, Iran.In this paper, a novel heterostructure junctionless tunnel field effect transistor with silicon-on-nothing technology (SON HS-JLTFET) is proposed. The proposed device has two advantages over conventional JLTFET. First, one decade of increment in the ON current is achieved and subthreshold swing is improved by 10%. In this device, InAs is used in the source region of SON HS-JLTFET which has a lower energy band gap than Si to achieve thinner tunneling barrier width. Hence, more electron can tunnel from source to channel. As a result, it provides improvements in drain current and subthreshold swing. The second advantage is that the ambipolar current reduction due to the use of SON technique. In fact, in this technique, air is considered as the gate dielectric which results in decrement in the electric field in the drain/channel junction. This reduced electric field causes increasing the width of the tunneling barrier which results in lower ambipolar current in the drain/channel junction..https://modelling.semnan.ac.ir/article_8360_a374f76599339e39f86d948a44b54647.pdftunnel field effecttransistorsubthreshold swingambipolar currentheterostructure
spellingShingle Amin Vanak
Amir Amini
A New Heterostructure Junctionless Tunnel Field Effect Transistor with Silicon-on-Nothing Technique for DC Parameter Improvement
مجله مدل سازی در مهندسی
tunnel field effect
transistor
subthreshold swing
ambipolar current
heterostructure
title A New Heterostructure Junctionless Tunnel Field Effect Transistor with Silicon-on-Nothing Technique for DC Parameter Improvement
title_full A New Heterostructure Junctionless Tunnel Field Effect Transistor with Silicon-on-Nothing Technique for DC Parameter Improvement
title_fullStr A New Heterostructure Junctionless Tunnel Field Effect Transistor with Silicon-on-Nothing Technique for DC Parameter Improvement
title_full_unstemmed A New Heterostructure Junctionless Tunnel Field Effect Transistor with Silicon-on-Nothing Technique for DC Parameter Improvement
title_short A New Heterostructure Junctionless Tunnel Field Effect Transistor with Silicon-on-Nothing Technique for DC Parameter Improvement
title_sort new heterostructure junctionless tunnel field effect transistor with silicon on nothing technique for dc parameter improvement
topic tunnel field effect
transistor
subthreshold swing
ambipolar current
heterostructure
url https://modelling.semnan.ac.ir/article_8360_a374f76599339e39f86d948a44b54647.pdf
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