12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital convertor using a four‐stage ring amplifier with coarse‐analogue‐to‐digital convertor embedded
Abstract This article presents a 12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital converter. By adopting a new auto‐zero scheme, a calibration‐free four‐stage ring residue amplifier with a small offset cancellation capacitor is proposed. In addition, the coarse‐ana...
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| Format: | Article |
| Language: | English |
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Wiley
2024-12-01
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| Series: | Electronics Letters |
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| Online Access: | https://doi.org/10.1049/ell2.70101 |
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| _version_ | 1846120978924437504 |
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| author | Linghao Liu Junyan Ren Fan Ye |
| author_facet | Linghao Liu Junyan Ren Fan Ye |
| author_sort | Linghao Liu |
| collection | DOAJ |
| description | Abstract This article presents a 12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital converter. By adopting a new auto‐zero scheme, a calibration‐free four‐stage ring residue amplifier with a small offset cancellation capacitor is proposed. In addition, the coarse‐analogue‐to‐digital converter of the second stage is embedded into the amplification phase, which relaxes the comparison periods of the first and second stages by 25.0% and 17.4%, respectively. Post‐simulated in 28‐nm CMOS technology with a 0.9 V supply, the analogue‐to‐digital converter achieves 62.2 dB SNDR and 78.1 dB SFDR. It consumes 8.45 mW with an on‐chip reference voltage buffer, resulting in Schreier's figure of merit (FoMS) of 166.9 dB. |
| format | Article |
| id | doaj-art-bd0d2b90a55e49e0aa69b443035b4cfc |
| institution | Kabale University |
| issn | 0013-5194 1350-911X |
| language | English |
| publishDate | 2024-12-01 |
| publisher | Wiley |
| record_format | Article |
| series | Electronics Letters |
| spelling | doaj-art-bd0d2b90a55e49e0aa69b443035b4cfc2024-12-16T06:52:28ZengWileyElectronics Letters0013-51941350-911X2024-12-016023n/an/a10.1049/ell2.7010112b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital convertor using a four‐stage ring amplifier with coarse‐analogue‐to‐digital convertor embeddedLinghao Liu0Junyan Ren1Fan Ye2State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai ChinaState Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai ChinaState Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai ChinaAbstract This article presents a 12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital converter. By adopting a new auto‐zero scheme, a calibration‐free four‐stage ring residue amplifier with a small offset cancellation capacitor is proposed. In addition, the coarse‐analogue‐to‐digital converter of the second stage is embedded into the amplification phase, which relaxes the comparison periods of the first and second stages by 25.0% and 17.4%, respectively. Post‐simulated in 28‐nm CMOS technology with a 0.9 V supply, the analogue‐to‐digital converter achieves 62.2 dB SNDR and 78.1 dB SFDR. It consumes 8.45 mW with an on‐chip reference voltage buffer, resulting in Schreier's figure of merit (FoMS) of 166.9 dB.https://doi.org/10.1049/ell2.70101amplifiersanalogue–digital conversionMMICMMIC amplifierspower amplifiers |
| spellingShingle | Linghao Liu Junyan Ren Fan Ye 12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital convertor using a four‐stage ring amplifier with coarse‐analogue‐to‐digital convertor embedded Electronics Letters amplifiers analogue–digital conversion MMIC MMIC amplifiers power amplifiers |
| title | 12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital convertor using a four‐stage ring amplifier with coarse‐analogue‐to‐digital convertor embedded |
| title_full | 12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital convertor using a four‐stage ring amplifier with coarse‐analogue‐to‐digital convertor embedded |
| title_fullStr | 12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital convertor using a four‐stage ring amplifier with coarse‐analogue‐to‐digital convertor embedded |
| title_full_unstemmed | 12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital convertor using a four‐stage ring amplifier with coarse‐analogue‐to‐digital convertor embedded |
| title_short | 12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital convertor using a four‐stage ring amplifier with coarse‐analogue‐to‐digital convertor embedded |
| title_sort | 12b 500ms s successive approximation register assisted pipeline analogue to digital convertor using a four stage ring amplifier with coarse analogue to digital convertor embedded |
| topic | amplifiers analogue–digital conversion MMIC MMIC amplifiers power amplifiers |
| url | https://doi.org/10.1049/ell2.70101 |
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