Research and design of parallel architecture processor for elliptic curve cryptography - YANG Xiao-hui; DAI Zi-bin; LI Miao; ZHANG Yong-fu (Tongxin xuebao)
Based on the analysis of the ECC algorithms processing structure characteristics and parallel schedule on finite field level,a parallel architecture processor model for ECC was proposed which adopting the ILP and DLP.A prototype has been implemented based on the parallel architecture processor model.And storage structure in the model is also analyzed.The prototype is realized using FPGA,and synthesis,place and route have been accomplished under 0.18μm CMOS technology.The results prove that the proposed parallel architecture processor for ECC can guarantee high flexibility for arbitrary ECC algorithms and can achieve high performance.