Runtime Task Scheduling for FPGA-Based Embedded Systems Using Just-in-Time Bitstream Prefetching

Dynamically and partially reconfigurable Field Programmable Gate Arrays (FPGAs) offer high performances and flexibility. These platforms can hot-swap reconfigurable regions to change the hardware behavior at the cost of a reconfiguration process. The scheduling of applications and their reconfigurat...

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Bibliographic Details
Main Authors: Alexis Duhamel, Sebastien Pillement
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10769450/
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Summary:Dynamically and partially reconfigurable Field Programmable Gate Arrays (FPGAs) offer high performances and flexibility. These platforms can hot-swap reconfigurable regions to change the hardware behavior at the cost of a reconfiguration process. The scheduling of applications and their reconfiguration processes are then essential to respect timing constraints. In this paper, we introduce PF-PEFT, a scheduling heuristic for dynamically reconfigurable FPGA architectures. Results show that our approach reduces schedules duration by up to 13% compared to a comparable state-of-the-art approach.
ISSN:2169-3536