Compact software/hardware co-design and implementation method of Aigis-sig digital signature scheme

Digital signature scheme Aigis-sig, constructed on ideal lattice, takes the advantages of high efficiency, short signature length and resistant to quantum attack, etc.An optimized modular multiplication arithmetic component was constructed and a compact hardware architecture for polynomial operation...

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Bibliographic Details
Main Authors: Zhen ZHOU, Debiao HE, Min LUO, Li LI
Format: Article
Language:English
Published: POSTS&TELECOM PRESS Co., LTD 2021-04-01
Series:网络与信息安全学报
Subjects:
Online Access:http://www.cjnis.com.cn/thesisDetails#10.11959/j.issn.2096-109x.2021026
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Summary:Digital signature scheme Aigis-sig, constructed on ideal lattice, takes the advantages of high efficiency, short signature length and resistant to quantum attack, etc.An optimized modular multiplication arithmetic component was constructed and a compact hardware architecture for polynomial operation over a ring based on number theory transformation (NTT) algorithm for Aigis-sig was designed.Besides, based on this architecture, software/hardware co-design and implementation for Aigis-sig scheme on FPGA platform in cryptography was proposed.Experimental results show that the speed of signature phase and verification phase are increased by about 26% and 17% respectively, compared with the pure software implementation on Xilinx Zynq-7000 SoC platform when CPU clock frequency and hardware clock frequency are set as 666.66MHz and 150 MHz respectively.
ISSN:2096-109X