APA (7th ed.) Citation

Roshanpanah, A., Torkzadeh, P., Hajsadeghi, K., & Dousti, M. Design and Implementation of a 16-bit Multi-Mode Delta-Sigma Digital-to-Analog Converter with Time-Interleaved Structure, Multi-Channel, and Compensation of Non-Idealities Based on FPGA. Islamic Azad University Bushehr Branch.

Chicago Style (17th ed.) Citation

Roshanpanah, Abolfazl, Pooya Torkzadeh, Khosrow Hajsadeghi, and Massoud Dousti. Design and Implementation of a 16-bit Multi-Mode Delta-Sigma Digital-to-Analog Converter with Time-Interleaved Structure, Multi-Channel, and Compensation of Non-Idealities Based on FPGA. Islamic Azad University Bushehr Branch.

MLA (9th ed.) Citation

Roshanpanah, Abolfazl, et al. Design and Implementation of a 16-bit Multi-Mode Delta-Sigma Digital-to-Analog Converter with Time-Interleaved Structure, Multi-Channel, and Compensation of Non-Idealities Based on FPGA. Islamic Azad University Bushehr Branch.

Warning: These citations may not always be 100% accurate.