Efficient implementation scheme of SM4 algorithm based on FPGA

Efficient implementation scheme of SM4 algorithm based on FPGA

To address the inefficient data processing performance and excessive resource utilization issues that field-programmable gate array (FPGA)-based SM4 implementations faced, an implementation scheme that adopted both iteration and pipeline in order to reduce resource consumption and improve throughput...

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Bibliographic Details
Main Authors: ZHANG Hongke, YUAN Haonan, DING Wenxiu, YAN Zheng, LI Bin, LIANG Dong
Format: Article
Language:zho
Published: Editorial Department of Journal on Communications 2024-05-01
Series:Tongxin xuebao
Subjects:
SM4 algorithm
FPGA implementation
pipeline architecture
algebraic S-box
Online Access:http://www.joconline.com.cn/zh/article/doi/10.11959/j.issn.1000-436x.2024053/
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