Ultra‐low‐power, high PSRR CMOS voltage reference with negative feedback - Yanhan Zeng; Yuao Li; Xin Zhang; Hong‐Zhou Tan (IET Circuits, Devices and Systems)
Based on negative feedback technique, a complementary metal–oxide semiconductor (CMOS) voltage reference with ultra‐low‐power, low supply voltage and high‐power supply rejection ratio (PSRR) is proposed and simulated using a 0.18 standard micrometre CMOS technology. The operating supply voltage ranges from 0.85 V to 2.5 V and the temperature ranges from −20°C to 80°C. The voltage reference can achieve a temperature coefficient of 16.3 ppm/°C and line sensitivity as low as 0.086 ppm/V, without the use of resistors or special devices, consuming 202 nA current at 27°C. Besides, the PSRR is only −113 dB at 1 Hz, −64 dB at 1 kHz, respectively.