APA (7th ed.) Citation

Bhakta, P. A., Plusquellic, J., Suchanek, A., & Mannos, T. J. Fail-Safe Logic Design Strategies Within Modern FPGA Architectures. IEEE.

Chicago Style (17th ed.) Citation

Bhakta, Priya A., Jim Plusquellic, Andrew Suchanek, and Tom J. Mannos. Fail-Safe Logic Design Strategies Within Modern FPGA Architectures. IEEE.

MLA (9th ed.) Citation

Bhakta, Priya A., et al. Fail-Safe Logic Design Strategies Within Modern FPGA Architectures. IEEE.