Bypass node non-redundant adding algorithm for crossing-level data transmission in two-dimension reconfigurable cell array - Nai-jin CHEN; Zhi-yong FENG; Jian-hui JIANG (Tongxin xuebao)
As for the problem of hardware task crossing-level data transmission，a preorder traversing backtracking adding_bypass_node (PTBA) algorithm is presented which maintains logic relation among original computing nodes and does not add redundancy nodes based on data flow graph with crossing-level-in-tree(CLIT) and crossing-level-out-tree (CLOT).The pipelined model of partitioning mapping and the quantitative evaluation indexes are presented for the dynamic reconfigurable system.The critical condition of PTBA mapping is proposed.Compared with preorder traversing backtracking no adding_bypass_node (PTBNA) mapping，and under the premise of critical condition，experimental results show PTBA mapping can improve the number of modules，the number of non-original input times and non-original output times，the total execution delay and powers of all partitioning based on the same system architecture and partitioning mapping algorithm.The proposed algorithm obtains the less average execution total cycles by 23.3%(RCA5×5)，30.5%(RCA8×8)，and the less average power consumption by 15.7%(RCA5×5)，18.6%(RCA8×8) than previous advanced split-push kernel mapping(SPKM).PTBA has rationality and effectiveness.