Ternary computing using a novel spintronic multi-operator logic-in-memory architecture
This paper presents a novel multi-operator ternary logic-in-memory (LiM) design that addresses the challenges of the Von-Neumann bottleneck architecture. The proposed design leverages magnetic tunnel junctions (MTJ), which provide nonvolatile memory capabilities. Nonvolatility ensures that data is r...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2025-03-01
|
| Series: | Results in Engineering |
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2590123025000994 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1841543986963021824 |
|---|---|
| author | Amirhossein Fathollahi Abdolah Amirany Mohammad Hossein Moaiyeri |
| author_facet | Amirhossein Fathollahi Abdolah Amirany Mohammad Hossein Moaiyeri |
| author_sort | Amirhossein Fathollahi |
| collection | DOAJ |
| description | This paper presents a novel multi-operator ternary logic-in-memory (LiM) design that addresses the challenges of the Von-Neumann bottleneck architecture. The proposed design leverages magnetic tunnel junctions (MTJ), which provide nonvolatile memory capabilities. Nonvolatility ensures that data is retained even when powered down, enhancing reliability and reducing energy waste during idle periods. The proposed LiM architecture can perform all fundamental ternary logic operations, such as AND/NAND, OR/NOR, and XNOR/XOR, within the memory itself, eliminating the need for separate logic units and reducing data transfer delays. The proposed innovative approach based on the well-known MTJ and FinFET technologies offers substantial improvements over existing architectures, with a 78 % reduction in delay and an 86 % reduction in power consumption. Digital image processing simulations, as real-world applications, also demonstrate the design's practical effectiveness by achieving up to 98 % reduction in energy consumption. This makes the proposed ternary LiM architecture a promising solution for future high-performance, energy-efficient computing systems. |
| format | Article |
| id | doaj-art-5f31998661a549f58d1890a61ef1fb60 |
| institution | Kabale University |
| issn | 2590-1230 |
| language | English |
| publishDate | 2025-03-01 |
| publisher | Elsevier |
| record_format | Article |
| series | Results in Engineering |
| spelling | doaj-art-5f31998661a549f58d1890a61ef1fb602025-01-13T04:19:08ZengElsevierResults in Engineering2590-12302025-03-0125104011Ternary computing using a novel spintronic multi-operator logic-in-memory architectureAmirhossein Fathollahi0Abdolah Amirany1Mohammad Hossein Moaiyeri2Faculty of Electrical Engineering, Shahid Beheshti University, Tehran, IranDepartment of Electrical and Computer Engineering, The George Washington University, Washington, DC, USAFaculty of Electrical Engineering, Shahid Beheshti University, Tehran, Iran; Corresponding author.This paper presents a novel multi-operator ternary logic-in-memory (LiM) design that addresses the challenges of the Von-Neumann bottleneck architecture. The proposed design leverages magnetic tunnel junctions (MTJ), which provide nonvolatile memory capabilities. Nonvolatility ensures that data is retained even when powered down, enhancing reliability and reducing energy waste during idle periods. The proposed LiM architecture can perform all fundamental ternary logic operations, such as AND/NAND, OR/NOR, and XNOR/XOR, within the memory itself, eliminating the need for separate logic units and reducing data transfer delays. The proposed innovative approach based on the well-known MTJ and FinFET technologies offers substantial improvements over existing architectures, with a 78 % reduction in delay and an 86 % reduction in power consumption. Digital image processing simulations, as real-world applications, also demonstrate the design's practical effectiveness by achieving up to 98 % reduction in energy consumption. This makes the proposed ternary LiM architecture a promising solution for future high-performance, energy-efficient computing systems.http://www.sciencedirect.com/science/article/pii/S2590123025000994Logic in memorySpintronicsMagnetic tunnel junctionsTernary logicDigital image processing |
| spellingShingle | Amirhossein Fathollahi Abdolah Amirany Mohammad Hossein Moaiyeri Ternary computing using a novel spintronic multi-operator logic-in-memory architecture Results in Engineering Logic in memory Spintronics Magnetic tunnel junctions Ternary logic Digital image processing |
| title | Ternary computing using a novel spintronic multi-operator logic-in-memory architecture |
| title_full | Ternary computing using a novel spintronic multi-operator logic-in-memory architecture |
| title_fullStr | Ternary computing using a novel spintronic multi-operator logic-in-memory architecture |
| title_full_unstemmed | Ternary computing using a novel spintronic multi-operator logic-in-memory architecture |
| title_short | Ternary computing using a novel spintronic multi-operator logic-in-memory architecture |
| title_sort | ternary computing using a novel spintronic multi operator logic in memory architecture |
| topic | Logic in memory Spintronics Magnetic tunnel junctions Ternary logic Digital image processing |
| url | http://www.sciencedirect.com/science/article/pii/S2590123025000994 |
| work_keys_str_mv | AT amirhosseinfathollahi ternarycomputingusinganovelspintronicmultioperatorlogicinmemoryarchitecture AT abdolahamirany ternarycomputingusinganovelspintronicmultioperatorlogicinmemoryarchitecture AT mohammadhosseinmoaiyeri ternarycomputingusinganovelspintronicmultioperatorlogicinmemoryarchitecture |