A Practical Cache Partitioning Method for Multi-Core Processor on a Commercial Safety-Critical Partitioned RTOS
In modern airborne systems, software plays a crucial role for meeting functional, safety, and performance requirements. Integrated Modular Avionics (IMA) and multi-core processors (MCPs) are also adopted for hardware to enhance performance and Space, Weight, and Power (SWaP). While MCPs improve effi...
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Main Author: | Taeho Kim |
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Format: | Article |
Language: | English |
Published: |
IEEE
2025-01-01
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Series: | IEEE Access |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/10870213/ |
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