Enhanced Drive Current in 10 nm Channel Length Gate-All-Around Field-Effect Transistor Using Ultrathin Strained Si/SiGe Channel
The continuous scaling down of MOSFETs is one of the present trends in semiconductor devices to increase device performance. Nevertheless, with scaling down beyond 22 nm technology, the performance of even the newer nanodevices with multi-gate architecture declines with an increase in short channel...
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2024-11-01
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| author | Potaraju Yugender Rudra Sankar Dhar Swagat Nanda Kuleen Kumar Pandurengan Sakthivel Arun Thirumurugan |
| author_facet | Potaraju Yugender Rudra Sankar Dhar Swagat Nanda Kuleen Kumar Pandurengan Sakthivel Arun Thirumurugan |
| author_sort | Potaraju Yugender |
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| description | The continuous scaling down of MOSFETs is one of the present trends in semiconductor devices to increase device performance. Nevertheless, with scaling down beyond 22 nm technology, the performance of even the newer nanodevices with multi-gate architecture declines with an increase in short channel effects (SCEs). Consequently, to facilitate further increases in the drain current, the use of strained silicon technology provides a better solution. Thus, the development of a novel Gate-All-Around Field-Effect Transistor (GAAFET) incorporating a strained silicon channel with a 10 nm gate length is initiated and discussed. In this device, strain is incorporated in the channel, where a strained silicon germanium layer is wedged between two strained silicon layers. The GAAFET device has four gates that surround the channel to provide improved control of the gate over the strained channel region and also reduce the short channel effects in the devices. The electrical properties, such as the on current, off current, threshold voltage (V<sub>TH</sub>), subthreshold slope, drain-induced barrier lowering (DIBL), and I<sub>on</sub>/I<sub>off</sub> current ratio, of the 10 nm channel length GAAFET are compared with the 22 nm strained silicon channel GAAFET, the existing SOI FinFET device on 10 nm gate length, and IRDS 2022 specifications device. The developed 10 nm channel length GAAFET, having an ultrathin strained silicon channel, delivers enriched device performance, being augmented in contrast to the IRDS 2022 specifications device, showing improved characteristics along with amended SCEs. |
| format | Article |
| id | doaj-art-59e2d5c3817c4f4f8e432bf17554be5f |
| institution | Kabale University |
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| language | English |
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| series | Micromachines |
| spelling | doaj-art-59e2d5c3817c4f4f8e432bf17554be5f2024-12-27T14:40:43ZengMDPI AGMicromachines2072-666X2024-11-011512145510.3390/mi15121455Enhanced Drive Current in 10 nm Channel Length Gate-All-Around Field-Effect Transistor Using Ultrathin Strained Si/SiGe ChannelPotaraju Yugender0Rudra Sankar Dhar1Swagat Nanda2Kuleen Kumar3Pandurengan Sakthivel4Arun Thirumurugan5Department of Electronics and Communication Engineering, National Institute of Technology Mizoram, Aizawl 796 012, Mizoram, IndiaDepartment of Electronics and Communication Engineering, National Institute of Technology Mizoram, Aizawl 796 012, Mizoram, IndiaDepartment of Electronics and Communication Engineering, National Institute of Technology Mizoram, Aizawl 796 012, Mizoram, IndiaDepartment of Electronics and Communication Engineering, National Institute of Technology Mizoram, Aizawl 796 012, Mizoram, IndiaCentre for Materials Science, Department of Science and Humanities-Physics, Faculty of Engineering, Karpagam Academy of Higher Education, Coimbatore 641 021, Tamil Nadu, IndiaSede Vallenar, Universidad de Atacama, Costanera 105, Vallenar 1612178, ChileThe continuous scaling down of MOSFETs is one of the present trends in semiconductor devices to increase device performance. Nevertheless, with scaling down beyond 22 nm technology, the performance of even the newer nanodevices with multi-gate architecture declines with an increase in short channel effects (SCEs). Consequently, to facilitate further increases in the drain current, the use of strained silicon technology provides a better solution. Thus, the development of a novel Gate-All-Around Field-Effect Transistor (GAAFET) incorporating a strained silicon channel with a 10 nm gate length is initiated and discussed. In this device, strain is incorporated in the channel, where a strained silicon germanium layer is wedged between two strained silicon layers. The GAAFET device has four gates that surround the channel to provide improved control of the gate over the strained channel region and also reduce the short channel effects in the devices. The electrical properties, such as the on current, off current, threshold voltage (V<sub>TH</sub>), subthreshold slope, drain-induced barrier lowering (DIBL), and I<sub>on</sub>/I<sub>off</sub> current ratio, of the 10 nm channel length GAAFET are compared with the 22 nm strained silicon channel GAAFET, the existing SOI FinFET device on 10 nm gate length, and IRDS 2022 specifications device. The developed 10 nm channel length GAAFET, having an ultrathin strained silicon channel, delivers enriched device performance, being augmented in contrast to the IRDS 2022 specifications device, showing improved characteristics along with amended SCEs.https://www.mdpi.com/2072-666X/15/12/1455GAAFETheterostructure-on-insulatoron currentstacked high-Kstrained silicon |
| spellingShingle | Potaraju Yugender Rudra Sankar Dhar Swagat Nanda Kuleen Kumar Pandurengan Sakthivel Arun Thirumurugan Enhanced Drive Current in 10 nm Channel Length Gate-All-Around Field-Effect Transistor Using Ultrathin Strained Si/SiGe Channel Micromachines GAAFET heterostructure-on-insulator on current stacked high-K strained silicon |
| title | Enhanced Drive Current in 10 nm Channel Length Gate-All-Around Field-Effect Transistor Using Ultrathin Strained Si/SiGe Channel |
| title_full | Enhanced Drive Current in 10 nm Channel Length Gate-All-Around Field-Effect Transistor Using Ultrathin Strained Si/SiGe Channel |
| title_fullStr | Enhanced Drive Current in 10 nm Channel Length Gate-All-Around Field-Effect Transistor Using Ultrathin Strained Si/SiGe Channel |
| title_full_unstemmed | Enhanced Drive Current in 10 nm Channel Length Gate-All-Around Field-Effect Transistor Using Ultrathin Strained Si/SiGe Channel |
| title_short | Enhanced Drive Current in 10 nm Channel Length Gate-All-Around Field-Effect Transistor Using Ultrathin Strained Si/SiGe Channel |
| title_sort | enhanced drive current in 10 nm channel length gate all around field effect transistor using ultrathin strained si sige channel |
| topic | GAAFET heterostructure-on-insulator on current stacked high-K strained silicon |
| url | https://www.mdpi.com/2072-666X/15/12/1455 |
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