FPGA‐Based Design of Ultra‐Efficient Approximate Adders for High‐Fidelity Image Processing: A Logic‐Optimized Approach

FPGA‐Based Design of Ultra‐Efficient Approximate Adders for High‐Fidelity Image Processing: A Logic‐Optimized Approach

ABSTRACT Emerging as a promising paradigm for improving energy efficiency in error‐tolerant applications including image processing, neural networks, and embedded vision systems is approximative computing. Most current approximative adder designs, however, either compromise output quality or show po...

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Bibliographic Details
Main Authors: Ramakrishna Reddy Eamani, N. Vinodhkumar, Ambe Harrison, Wulfran Fendzi Mbasso
Format: Article
Language:English
Published: Wiley 2025-07-01
Series:Engineering Reports
Subjects:
approximate computing
FPGA implementation
full adder design
image processing
low‐power logic
PSNR
Online Access:https://doi.org/10.1002/eng2.70262
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https://doi.org/10.1002/eng2.70262

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