High-speed hardware architecture design and implementation of Ed25519 signature verification algorithm
Aiming at the high performance requirements of signature verification for specific scenarios such as blockchain, a high-speed hardware architecture of Ed25519 was proposed.To reduce the number of calculations for point addition and point double, a multiple point multiplication algorithm based on int...
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| Main Authors: | , , , , |
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| Format: | Article |
| Language: | zho |
| Published: |
Editorial Department of Journal on Communications
2022-03-01
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| Series: | Tongxin xuebao |
| Subjects: | |
| Online Access: | http://www.joconline.com.cn/zh/article/doi/10.11959/j.issn.1000-436x.2022061/ |
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