Mechanism of Threshold Voltage Instability in Double Gate α-IGZO Nanosheet TFT Under Bias and Temperature Stress - Muhammad Aslam; Shu-Wei Chang; Yi-Ho Chen; Yao-Jen Lee; Yiming Li; Wen-Hsi Lee (IEEE Journal of the Electron Devices Society)
ABSTRACT Amorphous indium gallium zinc oxide (a-IGZO)-based thin film transistors (TFTs) are increasingly becoming popular because of their potential in futuristic applications, including CMOS technology. Given the demand for CMOS-compatible, ultra-scaled, reliable, and high-performing devices, we fabricate and analyze scaled-channel a-IGZO-TFTs with an optimal double-gate structure, a thin nanosheet-based channel, and an effective high- $κ$ dielectric namely HfO2. The reliably reported double gate IGZO nanosheet TFTs (DG-IGZO-NS-TFTs) are tested under positive and negative bias stress at variant temperatures, and the resulting modulations are analyzed critically. The reported DG-IGZO-NSTFTs exhibit a negative side threshold voltage shift ( $Δ$ Vth) accompanied by an increase in Ion/Ion(0) under negative bias temperature stress (NBTS) at elevated temperatures, which indicates the presence of additional charges. An anomalous negative side shifting of the Vth is observed under positive bias temperature stress (PBTS), where diffused hydrogen atoms are identified as introducing excess n-type carriers into the channel and causing the observed $Δ$ Vth. The spectroscopic analysis is performed to establish evidence for the assumed mechanisms, and the role of individual gates is investigated in the context of performance variance under temperature-bias stress. Moreover, the partial reversibility of the stress-induced degradation is experimentally established and methodically discussed. Overall, the reported results offer a comprehensive understanding of scaled-channel DG-NS-IGZO-TFTs, which help shape performance-enhancement strategies, control degradation mechanisms, and define appropriate application scenarios.