APA (7th ed.) Citation

Sinha, S., & Srikanthan, T. Architecture and Application-Aware Management of Complexity of Mapping Multiplication to FPGA DSP Blocks in High Level Synthesis. Wiley.

Chicago Style (17th ed.) Citation

Sinha, Sharad, and Thambipillai Srikanthan. Architecture and Application-Aware Management of Complexity of Mapping Multiplication to FPGA DSP Blocks in High Level Synthesis. Wiley.

MLA (9th ed.) Citation

Sinha, Sharad, and Thambipillai Srikanthan. Architecture and Application-Aware Management of Complexity of Mapping Multiplication to FPGA DSP Blocks in High Level Synthesis. Wiley.

Warning: These citations may not always be 100% accurate.