Self-defined dual charge percolation networks for solution-processed multithreshold transistors - Jung Woo Moon; Seunghan Kim; Jin Hyeon Kim; Sunil V. Barma; Sang Young Jeong; Jinho Keum; Ho Sun Lim; Youngjae Yoo; Han Young Woo; Sae Byeok Jo; Moon Sung Kang; Jeong Ho Cho (npj Flexible Electronics)
Abstract This study demonstrates multithreshold engineering of a solution-processed heterojunction electrochemical transistor using a blend of n-type CdSe tetrapod-shaped nanocrystals (TpNCs) and an n-type polymeric organic semiconductor (OSC). The unique geometry of TpNCs enables a broad concentration range of charge percolation, where charge transfer between TpNC and OSC domains determines multiple threshold voltages. The OSC domain’s threshold voltage shifts from 1 to −1 V as TpNC content increases, while the TpNC domain maintains a threshold above 1.5 V. This allows for stable intermediate states, crucial for multivalued logic operations. Charge percolation and photoluminescence studies show selective charge redistribution, shifting the threshold voltages in the polymer networks. Ternary logic gates, including TNOT, TNAND, and TNOR, based on these heterojunction transistors, were also demonstrated, highlighting the potential of this approach for advanced logic applications.