Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations
This article presents a monolithic 3-D associative in-memory processor (M3D AP) that combines emerging nonvolatile (NV) magnetic tunnel junction (MTJ) technology with massively parallel associative in-memory processing and M3D integration. The proposed architecture features two monolithic layers, wi...
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| Format: | Article |
| Language: | English |
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IEEE
2024-01-01
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| Series: | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
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| Online Access: | https://ieeexplore.ieee.org/document/10649641/ |
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| _version_ | 1841526336573669376 |
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| author | Esteban Garzon Alessandro Bedoya Marco Lanuzza Leonid Yavits |
| author_facet | Esteban Garzon Alessandro Bedoya Marco Lanuzza Leonid Yavits |
| author_sort | Esteban Garzon |
| collection | DOAJ |
| description | This article presents a monolithic 3-D associative in-memory processor (M3D AP) that combines emerging nonvolatile (NV) magnetic tunnel junction (MTJ) technology with massively parallel associative in-memory processing and M3D integration. The proposed architecture features two monolithic layers, with CMOS logic in the first layer and an MTJ-based content-addressable memory (CAM) array in the second layer. We conduct a thorough analysis of the electrical characteristics of the MTJ-based AP and use analysis results to evaluate the performance and power consumption of the M3D AP. We build a custom cycle-accurate simulator to implement and evaluate the 3-D associative matrix multiplication algorithm, highlighting the potential of the M3D AP for accelerating artificial intelligence applications. Overall, we demonstrate the efficacy of M3D AP and show that it holds promise for high-performance and energy-efficient in-memory computing. |
| format | Article |
| id | doaj-art-3819be26b022449b860fd029a320c6a3 |
| institution | Kabale University |
| issn | 2329-9231 |
| language | English |
| publishDate | 2024-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
| spelling | doaj-art-3819be26b022449b860fd029a320c6a32025-01-17T00:00:32ZengIEEEIEEE Journal on Exploratory Solid-State Computational Devices and Circuits2329-92312024-01-0110404810.1109/JXCDC.2024.345081010649641Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient ComputationsEsteban Garzon0https://orcid.org/0000-0002-5862-2246Alessandro Bedoya1https://orcid.org/0000-0002-8055-1595Marco Lanuzza2https://orcid.org/0000-0002-6480-9218Leonid Yavits3https://orcid.org/0000-0001-5248-3997Department of Computer Engineering, Modeling, Electronics and Systems, University of Calabria, Rende, ItalyDepartment of Computer Engineering, Modeling, Electronics and Systems, University of Calabria, Rende, ItalyDepartment of Computer Engineering, Modeling, Electronics and Systems, University of Calabria, Rende, ItalyEnICS Labs, Faculty of Engineering, Bar-Ilan University, Ramat Gan, IsraelThis article presents a monolithic 3-D associative in-memory processor (M3D AP) that combines emerging nonvolatile (NV) magnetic tunnel junction (MTJ) technology with massively parallel associative in-memory processing and M3D integration. The proposed architecture features two monolithic layers, with CMOS logic in the first layer and an MTJ-based content-addressable memory (CAM) array in the second layer. We conduct a thorough analysis of the electrical characteristics of the MTJ-based AP and use analysis results to evaluate the performance and power consumption of the M3D AP. We build a custom cycle-accurate simulator to implement and evaluate the 3-D associative matrix multiplication algorithm, highlighting the potential of the M3D AP for accelerating artificial intelligence applications. Overall, we demonstrate the efficacy of M3D AP and show that it holds promise for high-performance and energy-efficient in-memory computing.https://ieeexplore.ieee.org/document/10649641/3-D integrationassociative processorcontent-addressable memory (CAM)data-intensive applicationsmonolithic 3-D (M3D)nonvolatile (NV) CAM |
| spellingShingle | Esteban Garzon Alessandro Bedoya Marco Lanuzza Leonid Yavits Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 3-D integration associative processor content-addressable memory (CAM) data-intensive applications monolithic 3-D (M3D) nonvolatile (NV) CAM |
| title | Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations |
| title_full | Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations |
| title_fullStr | Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations |
| title_full_unstemmed | Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations |
| title_short | Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations |
| title_sort | monolithic 3 d based nonvolatile associative processor for high performance energy efficient computations |
| topic | 3-D integration associative processor content-addressable memory (CAM) data-intensive applications monolithic 3-D (M3D) nonvolatile (NV) CAM |
| url | https://ieeexplore.ieee.org/document/10649641/ |
| work_keys_str_mv | AT estebangarzon monolithic3dbasednonvolatileassociativeprocessorforhighperformanceenergyefficientcomputations AT alessandrobedoya monolithic3dbasednonvolatileassociativeprocessorforhighperformanceenergyefficientcomputations AT marcolanuzza monolithic3dbasednonvolatileassociativeprocessorforhighperformanceenergyefficientcomputations AT leonidyavits monolithic3dbasednonvolatileassociativeprocessorforhighperformanceenergyefficientcomputations |