Dynamic Voltage Balancing Across Series-Connected 10 kV SiC JBS Diodes in Medium Voltage 3L-NPC Power Converter Having Snubberless Series-Connected 10 kV SiC MOSFETs
This article addresses the mitigation of dynamic voltage imbalance in series-connected 10 kV silicon carbide (SiC) JBS diodes within a three-level NPC (3L-NPC) converter using active turn-<sc>off</sc> delay control across complementary series-connected 10 kV SiC <sc>mosfet</sc&g...
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| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2024-01-01
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| Series: | IEEE Open Journal of the Industrial Electronics Society |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10652239/ |
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| Summary: | This article addresses the mitigation of dynamic voltage imbalance in series-connected 10 kV silicon carbide (SiC) JBS diodes within a three-level NPC (3L-NPC) converter using active turn-<sc>off</sc> delay control across complementary series-connected 10 kV SiC <sc>mosfet</sc>s. The implementation of active turn-<sc>off</sc> delay control in SiC <sc>mosfet</sc>s eliminates the need for passive <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubbers, which otherwise increase the switching <inline-formula><tex-math notation="LaTeX">$dv/dt$</tex-math></inline-formula> mismatch and snubber current across the diodes. In addition, parasitic base-plate capacitance across <sc>mosfet</sc>s and diodes, along with parasitic bus bar and snubber inductance in the commutation path, contribute to turn-<sc>off</sc> voltage mismatch and snubber loss in series-connected 10 kV SiC JBS diodes. The mismatch in nonlinear capacitance of series-connected devices (<sc>mosfet</sc>s and diodes) and the nonlinear <sc>mosfet</sc> <inline-formula><tex-math notation="LaTeX">$i$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$-$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$v_{gs}$</tex-math></inline-formula> curve affect the turn-<sc>on</sc> and turn-<sc>off</sc> voltage transitions between complementary switching <sc>mosfet</sc>s and diodes, leading to variations in turn-<sc>off</sc> voltage mismatch and snubber losses. The 3L-NPC converter has eight types of switching transition, complicating the analysis of <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber design. This complexity is further increased by nonlinear device parameters, parasitic capacitance, and inductance in the commutation path for each of the eight 10 kV SiC <sc>mosfet</sc>s and four 10 kV SiC JBS diodes. To address these challenges, this research develops a mathematical model for the switching transition between 10 kV SiC <sc>mosfet</sc>s and complementary 10 kV SiC JBS diodes in a two-level clamped inductive switching (CIS) test setup. The model considers the effects of parasitic base-plate capacitance and the absence of an <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber due to active turn-<sc>off</sc> delay control across series-connected SiC <sc>mosfet</sc>s. Subsequently, the mathematical model is refined using an iterative algorithm to account for mismatches in nonlinear device capacitance of <sc>mosfet</sc>s and diodes, as well as the nonlinear <inline-formula><tex-math notation="LaTeX">$i$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$-$</tex-math></inline-formula><inline-formula><tex-math notation="LaTeX">$v_{gs}$</tex-math></inline-formula> curve of <sc>mosfet</sc>s during the switching transition of the diode. This refined model is then used to design the <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber for series-connected 10 kV SiC JBS diodes and to optimize the turn-<sc>on</sc> gate resistance of complementary 10 kV SiC <sc>mosfet</sc>s on two-level CIS test benches (TB1 and TB2). Following this, the design parameters are systematically adjusted using experimental results from 3L-NPC test benches 3 to 5. This article provides simplified steps for the design and analysis of the <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber in various test benches, validated by experimental data. The 3L-NPC converter with the final <inline-formula><tex-math notation="LaTeX">$RC$</tex-math></inline-formula> snubber design achieved 99.2% efficiency and a 35 V turn-<sc>off</sc> voltage mismatch. The maximum error between the theoretical model and experimental data is 4.8%. |
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| ISSN: | 2644-1284 |