Development of an Energy-Efficient Digital Trainer for Logic Design Education Using ATmega328P Microcontroller

In this paper, a digital trainer was designed and implemented. The purpose of a digital trainer is to teach students logic design skills in the digital electronics laboratory and provide them with hands-on experience in working with and modifying simple network digital circuits. The conventional dig...

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Main Authors: Owolabi A.O., Oke A.O., Obalalu A. M., Khan Umair, Prasad Brijesh, Bajaj Mohit
Format: Article
Language:English
Published: EDP Sciences 2024-01-01
Series:E3S Web of Conferences
Subjects:
Online Access:https://www.e3s-conferences.org/articles/e3sconf/pdf/2024/121/e3sconf_icrera2024_08001.pdf
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author Owolabi A.O.
Oke A.O.
Obalalu A. M.
Khan Umair
Prasad Brijesh
Bajaj Mohit
author_facet Owolabi A.O.
Oke A.O.
Obalalu A. M.
Khan Umair
Prasad Brijesh
Bajaj Mohit
author_sort Owolabi A.O.
collection DOAJ
description In this paper, a digital trainer was designed and implemented. The purpose of a digital trainer is to teach students logic design skills in the digital electronics laboratory and provide them with hands-on experience in working with and modifying simple network digital circuits. The conventional digital electronics trainer is both costly to obtain and available in limited quantities in most electronics and computer engineering labs, which also leads to high maintenance expenses. Therefore, this project concentrates on developing a digital trainer that is both cost-effective and efficient. The digital trainer was designed with an ATmega328P Microcontroller, which helps monitor and control the functioning of the system features in accordance with a set of written program codes and whose operating voltage ranges from 3.3 to 5.5 volts. It was designed to involve a function generator and LEDs. The function generator requires 12V to generate different waveform outputs, while each LED requires a minimum voltage of 1.7V to glow. The user provides input through the logic switches to the logic gates, which are then read by the Microcontroller. When the input from the logic gate is detected, the ATmega328P Microcontroller sends output through to the LCD, displaying the features in operation with the LEDs and showing the result of the tested circuit.
format Article
id doaj-art-24c3d544b4b143a3a5741d1eca497e8f
institution Kabale University
issn 2267-1242
language English
publishDate 2024-01-01
publisher EDP Sciences
record_format Article
series E3S Web of Conferences
spelling doaj-art-24c3d544b4b143a3a5741d1eca497e8f2024-11-21T11:32:01ZengEDP SciencesE3S Web of Conferences2267-12422024-01-015910800110.1051/e3sconf/202459108001e3sconf_icrera2024_08001Development of an Energy-Efficient Digital Trainer for Logic Design Education Using ATmega328P MicrocontrollerOwolabi A.O.0Oke A.O.1Obalalu A. M.2Khan Umair3Prasad Brijesh4Bajaj Mohit5Department of Mathematical Sciences, Augustine University Ilara-EpeDepartment of Computer Engineering, Ladoke Akintola University of TechnologyDepartment of Mathematics and Statistics, Kwara State UniversityDepartment of Mathematics, Faculty of Science, Sakarya UniversityDepartment of Mechanical Engineering, Graphic Era (Deemed to be University)Department of Electrical Engineering, Graphic Era (Deemed to be University)In this paper, a digital trainer was designed and implemented. The purpose of a digital trainer is to teach students logic design skills in the digital electronics laboratory and provide them with hands-on experience in working with and modifying simple network digital circuits. The conventional digital electronics trainer is both costly to obtain and available in limited quantities in most electronics and computer engineering labs, which also leads to high maintenance expenses. Therefore, this project concentrates on developing a digital trainer that is both cost-effective and efficient. The digital trainer was designed with an ATmega328P Microcontroller, which helps monitor and control the functioning of the system features in accordance with a set of written program codes and whose operating voltage ranges from 3.3 to 5.5 volts. It was designed to involve a function generator and LEDs. The function generator requires 12V to generate different waveform outputs, while each LED requires a minimum voltage of 1.7V to glow. The user provides input through the logic switches to the logic gates, which are then read by the Microcontroller. When the input from the logic gate is detected, the ATmega328P Microcontroller sends output through to the LCD, displaying the features in operation with the LEDs and showing the result of the tested circuit.https://www.e3s-conferences.org/articles/e3sconf/pdf/2024/121/e3sconf_icrera2024_08001.pdflogic gatesatmega328p microcontrollerlight emitting diodes (leds)liquid crystal display (lcd)function generator
spellingShingle Owolabi A.O.
Oke A.O.
Obalalu A. M.
Khan Umair
Prasad Brijesh
Bajaj Mohit
Development of an Energy-Efficient Digital Trainer for Logic Design Education Using ATmega328P Microcontroller
E3S Web of Conferences
logic gates
atmega328p microcontroller
light emitting diodes (leds)
liquid crystal display (lcd)
function generator
title Development of an Energy-Efficient Digital Trainer for Logic Design Education Using ATmega328P Microcontroller
title_full Development of an Energy-Efficient Digital Trainer for Logic Design Education Using ATmega328P Microcontroller
title_fullStr Development of an Energy-Efficient Digital Trainer for Logic Design Education Using ATmega328P Microcontroller
title_full_unstemmed Development of an Energy-Efficient Digital Trainer for Logic Design Education Using ATmega328P Microcontroller
title_short Development of an Energy-Efficient Digital Trainer for Logic Design Education Using ATmega328P Microcontroller
title_sort development of an energy efficient digital trainer for logic design education using atmega328p microcontroller
topic logic gates
atmega328p microcontroller
light emitting diodes (leds)
liquid crystal display (lcd)
function generator
url https://www.e3s-conferences.org/articles/e3sconf/pdf/2024/121/e3sconf_icrera2024_08001.pdf
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