Accuracy Improvement With Weight Mapping Strategy and Output Transformation for STT-MRAM-Based Computing-in-Memory
This work presents an analog computing-in-memory (CiM) macro with spin-transfer torque magnetic random access memory (STT-MRAM) and 28-nm CMOS technology. The adopted CiM bitcell uses a differential scheme and balances the input resistance to minimize the nonideal factors during multiply-accumulate...
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| Format: | Article |
| Language: | English |
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IEEE
2024-01-01
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| Series: | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
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| Online Access: | https://ieeexplore.ieee.org/document/10714384/ |
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| _version_ | 1841526331026702336 |
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| author | Xianggao Wang Na Wei Shifan Gao Wenhao Wu Yi Zhao |
| author_facet | Xianggao Wang Na Wei Shifan Gao Wenhao Wu Yi Zhao |
| author_sort | Xianggao Wang |
| collection | DOAJ |
| description | This work presents an analog computing-in-memory (CiM) macro with spin-transfer torque magnetic random access memory (STT-MRAM) and 28-nm CMOS technology. The adopted CiM bitcell uses a differential scheme and balances the input resistance to minimize the nonideal factors during multiply-accumulate (MAC) operations. Specialized peripheral circuits were designed for the current-scheme CiM architecture. More importantly, strategies of accuracy improvement were innovatively proposed as follows: 1) mapping most significant bit (MSB) to the far side of the MRAM array and 2) output linear transformation based on the reference columns. Circuit-level simulation verified the functionality and performance improvement of the CiM macro based on the MNIST and CIFAR-10 datasets, realizing a 3% and 5% accuracy loss compared with the benchmark, respectively. The 640-GOPS (8 bit) throughput, 34.6-TOPS/mm2 area compactness, and 83.3-TOPS/W energy efficiency demonstrate the advantages of STT-MRAM CiM in the coming AI era. |
| format | Article |
| id | doaj-art-23d8ddeb87e946859dd56a6a3f77fe35 |
| institution | Kabale University |
| issn | 2329-9231 |
| language | English |
| publishDate | 2024-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
| spelling | doaj-art-23d8ddeb87e946859dd56a6a3f77fe352025-01-17T00:00:38ZengIEEEIEEE Journal on Exploratory Solid-State Computational Devices and Circuits2329-92312024-01-0110758110.1109/JXCDC.2024.347836010714384Accuracy Improvement With Weight Mapping Strategy and Output Transformation for STT-MRAM-Based Computing-in-MemoryXianggao Wang0https://orcid.org/0000-0001-6820-899XNa Wei1Shifan Gao2Wenhao Wu3Yi Zhao4https://orcid.org/0000-0001-5368-3595College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, ChinaChina Nanhu Academy of Electronics and Information Technology, Jiaxing, ChinaCollege of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, ChinaChina Nanhu Academy of Electronics and Information Technology, Jiaxing, ChinaCollege of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, ChinaThis work presents an analog computing-in-memory (CiM) macro with spin-transfer torque magnetic random access memory (STT-MRAM) and 28-nm CMOS technology. The adopted CiM bitcell uses a differential scheme and balances the input resistance to minimize the nonideal factors during multiply-accumulate (MAC) operations. Specialized peripheral circuits were designed for the current-scheme CiM architecture. More importantly, strategies of accuracy improvement were innovatively proposed as follows: 1) mapping most significant bit (MSB) to the far side of the MRAM array and 2) output linear transformation based on the reference columns. Circuit-level simulation verified the functionality and performance improvement of the CiM macro based on the MNIST and CIFAR-10 datasets, realizing a 3% and 5% accuracy loss compared with the benchmark, respectively. The 640-GOPS (8 bit) throughput, 34.6-TOPS/mm2 area compactness, and 83.3-TOPS/W energy efficiency demonstrate the advantages of STT-MRAM CiM in the coming AI era.https://ieeexplore.ieee.org/document/10714384/Artificial intelligence (AI)computing-in-memory (CiM)linear transformationspin-transfer torque magnetic random access memory (STT-MRAM)weight mapping |
| spellingShingle | Xianggao Wang Na Wei Shifan Gao Wenhao Wu Yi Zhao Accuracy Improvement With Weight Mapping Strategy and Output Transformation for STT-MRAM-Based Computing-in-Memory IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Artificial intelligence (AI) computing-in-memory (CiM) linear transformation spin-transfer torque magnetic random access memory (STT-MRAM) weight mapping |
| title | Accuracy Improvement With Weight Mapping Strategy and Output Transformation for STT-MRAM-Based Computing-in-Memory |
| title_full | Accuracy Improvement With Weight Mapping Strategy and Output Transformation for STT-MRAM-Based Computing-in-Memory |
| title_fullStr | Accuracy Improvement With Weight Mapping Strategy and Output Transformation for STT-MRAM-Based Computing-in-Memory |
| title_full_unstemmed | Accuracy Improvement With Weight Mapping Strategy and Output Transformation for STT-MRAM-Based Computing-in-Memory |
| title_short | Accuracy Improvement With Weight Mapping Strategy and Output Transformation for STT-MRAM-Based Computing-in-Memory |
| title_sort | accuracy improvement with weight mapping strategy and output transformation for stt mram based computing in memory |
| topic | Artificial intelligence (AI) computing-in-memory (CiM) linear transformation spin-transfer torque magnetic random access memory (STT-MRAM) weight mapping |
| url | https://ieeexplore.ieee.org/document/10714384/ |
| work_keys_str_mv | AT xianggaowang accuracyimprovementwithweightmappingstrategyandoutputtransformationforsttmrambasedcomputinginmemory AT nawei accuracyimprovementwithweightmappingstrategyandoutputtransformationforsttmrambasedcomputinginmemory AT shifangao accuracyimprovementwithweightmappingstrategyandoutputtransformationforsttmrambasedcomputinginmemory AT wenhaowu accuracyimprovementwithweightmappingstrategyandoutputtransformationforsttmrambasedcomputinginmemory AT yizhao accuracyimprovementwithweightmappingstrategyandoutputtransformationforsttmrambasedcomputinginmemory |