Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge Notches
Compute-in-memory (CIM) crossbar arrays of non-volatile memory (NVM) synapse devices have been considered very attractive for fast and energy-efficient implementation of various neural network (NN) algorithms. High retention time of the synaptic states and high linearity and symmetry of the synaptic...
Saved in:
| Main Authors: | , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
|
| Series: | IEEE Open Journal of Nanotechnology |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10787236/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1841554017262501888 |
|---|---|
| author | Raman Hissariya Debanjan Bhowmik |
| author_facet | Raman Hissariya Debanjan Bhowmik |
| author_sort | Raman Hissariya |
| collection | DOAJ |
| description | Compute-in-memory (CIM) crossbar arrays of non-volatile memory (NVM) synapse devices have been considered very attractive for fast and energy-efficient implementation of various neural network (NN) algorithms. High retention time of the synaptic states and high linearity and symmetry of the synaptic weight update characteristics (long-term potentiation (LTP) and long-term depression (LTD)) are major requirements for the NVM synapses in order to obtain high classification accuracy upon implementation of the NN algorithms on the corresponding crossbar arrays. In this paper, with respect to the spin-orbit-torque-driven domain-wall synapse device, we show that addition of edge notches significantly helps in satisfying the aforementioned requirements. At finite temperatures, notches prevent the domain wall from moving due to stray dipole and thermal fields when SOT-causing current is not applied. This, in turn, improves linearity and asymmetry of the LTP and LTD characteristics of the device as well as the retention time of synaptic states. We have also studied how these synaptic properties depend on the spacing between the notches and the size of the notches in the device. We perform this analysis here through rigorous micromagnetic simulations carried out for room temperature (300K), with dipole and thermal fields taken into account. |
| format | Article |
| id | doaj-art-2174293c6fed4f62bcc3bee272fcafc0 |
| institution | Kabale University |
| issn | 2644-1292 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Open Journal of Nanotechnology |
| spelling | doaj-art-2174293c6fed4f62bcc3bee272fcafc02025-01-09T00:02:53ZengIEEEIEEE Open Journal of Nanotechnology2644-12922025-01-0161910.1109/OJNANO.2024.351490010787236Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge NotchesRaman Hissariya0https://orcid.org/0000-0003-2607-7017Debanjan Bhowmik1https://orcid.org/0000-0003-1136-8778Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, IndiaDepartment of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, IndiaCompute-in-memory (CIM) crossbar arrays of non-volatile memory (NVM) synapse devices have been considered very attractive for fast and energy-efficient implementation of various neural network (NN) algorithms. High retention time of the synaptic states and high linearity and symmetry of the synaptic weight update characteristics (long-term potentiation (LTP) and long-term depression (LTD)) are major requirements for the NVM synapses in order to obtain high classification accuracy upon implementation of the NN algorithms on the corresponding crossbar arrays. In this paper, with respect to the spin-orbit-torque-driven domain-wall synapse device, we show that addition of edge notches significantly helps in satisfying the aforementioned requirements. At finite temperatures, notches prevent the domain wall from moving due to stray dipole and thermal fields when SOT-causing current is not applied. This, in turn, improves linearity and asymmetry of the LTP and LTD characteristics of the device as well as the retention time of synaptic states. We have also studied how these synaptic properties depend on the spacing between the notches and the size of the notches in the device. We perform this analysis here through rigorous micromagnetic simulations carried out for room temperature (300K), with dipole and thermal fields taken into account.https://ieeexplore.ieee.org/document/10787236/Compute-in-memory (CIM) arraysCrossbar arraysNon volatile memory (NVM) synapse devicesSpin-orbit torque (SOT)Domain-wall motion |
| spellingShingle | Raman Hissariya Debanjan Bhowmik Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge Notches IEEE Open Journal of Nanotechnology Compute-in-memory (CIM) arrays Crossbar arrays Non volatile memory (NVM) synapse devices Spin-orbit torque (SOT) Domain-wall motion |
| title | Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge Notches |
| title_full | Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge Notches |
| title_fullStr | Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge Notches |
| title_full_unstemmed | Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge Notches |
| title_short | Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge Notches |
| title_sort | improving linearity and symmetry of synaptic update characteristics and retentivity of synaptic states of the domain wall device through addition of edge notches |
| topic | Compute-in-memory (CIM) arrays Crossbar arrays Non volatile memory (NVM) synapse devices Spin-orbit torque (SOT) Domain-wall motion |
| url | https://ieeexplore.ieee.org/document/10787236/ |
| work_keys_str_mv | AT ramanhissariya improvinglinearityandsymmetryofsynapticupdatecharacteristicsandretentivityofsynapticstatesofthedomainwalldevicethroughadditionofedgenotches AT debanjanbhowmik improvinglinearityandsymmetryofsynapticupdatecharacteristicsandretentivityofsynapticstatesofthedomainwalldevicethroughadditionofedgenotches |