Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures

Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures

Complementary metal–oxide–semiconductor (CMOS)-based computing promises drastic improvement in performance at extremely low temperatures (e.g., 77 K, 10 K). The field of extremely low temperature CMOS-environment-based computing holds the promise of delivering remarkable enhanc...

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Bibliographic Details
Main Authors: Shivendra Singh Parihar, Girish Pahwa, Baker Mohammad, Yogesh Singh Chauhan, Hussam Amrouch
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Transactions on Quantum Engineering
Subjects:
5 nm fin field-effect transistor (FinFET)
cryogenic complementary metal–oxide–semiconductor (CMOS)
low-power design
memory optimization
static random access memory (SRAM)
Online Access:https://ieeexplore.ieee.org/document/10778409/
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