A Single Event Effect Mitigation Strategy for Nanointegrated Circuit Reinforced Latches
With the widespread application of nano integrated circuits in high radiation environments such as aerospace and military, single event effects have become the main factor affecting their stability and reliability. To enhance the radiation resistance of circuits, a hardened latch design method based...
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IEEE
2024-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10807256/ |
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| author | Yizhu Wang |
| author_facet | Yizhu Wang |
| author_sort | Yizhu Wang |
| collection | DOAJ |
| description | With the widespread application of nano integrated circuits in high radiation environments such as aerospace and military, single event effects have become the main factor affecting their stability and reliability. To enhance the radiation resistance of circuits, a hardened latch design method based on Schmitt triggers is proposed. This method integrates multiple circuit elements such as Schmitt triggers, transmission gates, C-element, and inverters, and verifies its SET shielding and anti SEU capabilities through HSPICE simulation. The results showed that the hardened latch successfully blocked 148ps positive SET pulse and 137 ps negative SET pulse, and quickly recovered after high-energy event bombardment. Compared to traditional latches, study designed latch exhibited significant advantages in area (<inline-formula> <tex-math notation="LaTeX">$34.23~\mu $ </tex-math></inline-formula>m2), delay (40.25 ps), power consumption (11.62 uw), and noise resistance, with an output signal-to-noise ratio close to 30 dB. The PVT fluctuation analysis shows that the latch has strong stability in power consumption, delay and hardness. The research provides new ideas for radiation hardened design of nano integrated circuits, which is of great significance for improving the reliability of electronic devices in high radiation environments. |
| format | Article |
| id | doaj-art-0a2b8893df9c4831b30fd1b313bc6a20 |
| institution | Kabale University |
| issn | 2169-3536 |
| language | English |
| publishDate | 2024-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj-art-0a2b8893df9c4831b30fd1b313bc6a202024-12-31T00:00:32ZengIEEEIEEE Access2169-35362024-01-011219609219610410.1109/ACCESS.2024.352017010807256A Single Event Effect Mitigation Strategy for Nanointegrated Circuit Reinforced LatchesYizhu Wang0https://orcid.org/0009-0007-0245-7396School of Integrated Circuits, Wuxi Institute of Technology, Wuxi, ChinaWith the widespread application of nano integrated circuits in high radiation environments such as aerospace and military, single event effects have become the main factor affecting their stability and reliability. To enhance the radiation resistance of circuits, a hardened latch design method based on Schmitt triggers is proposed. This method integrates multiple circuit elements such as Schmitt triggers, transmission gates, C-element, and inverters, and verifies its SET shielding and anti SEU capabilities through HSPICE simulation. The results showed that the hardened latch successfully blocked 148ps positive SET pulse and 137 ps negative SET pulse, and quickly recovered after high-energy event bombardment. Compared to traditional latches, study designed latch exhibited significant advantages in area (<inline-formula> <tex-math notation="LaTeX">$34.23~\mu $ </tex-math></inline-formula>m2), delay (40.25 ps), power consumption (11.62 uw), and noise resistance, with an output signal-to-noise ratio close to 30 dB. The PVT fluctuation analysis shows that the latch has strong stability in power consumption, delay and hardness. The research provides new ideas for radiation hardened design of nano integrated circuits, which is of great significance for improving the reliability of electronic devices in high radiation environments.https://ieeexplore.ieee.org/document/10807256/Single event effectlatchcircuitnanoSEUSET |
| spellingShingle | Yizhu Wang A Single Event Effect Mitigation Strategy for Nanointegrated Circuit Reinforced Latches IEEE Access Single event effect latch circuit nano SEU SET |
| title | A Single Event Effect Mitigation Strategy for Nanointegrated Circuit Reinforced Latches |
| title_full | A Single Event Effect Mitigation Strategy for Nanointegrated Circuit Reinforced Latches |
| title_fullStr | A Single Event Effect Mitigation Strategy for Nanointegrated Circuit Reinforced Latches |
| title_full_unstemmed | A Single Event Effect Mitigation Strategy for Nanointegrated Circuit Reinforced Latches |
| title_short | A Single Event Effect Mitigation Strategy for Nanointegrated Circuit Reinforced Latches |
| title_sort | single event effect mitigation strategy for nanointegrated circuit reinforced latches |
| topic | Single event effect latch circuit nano SEU SET |
| url | https://ieeexplore.ieee.org/document/10807256/ |
| work_keys_str_mv | AT yizhuwang asingleeventeffectmitigationstrategyfornanointegratedcircuitreinforcedlatches AT yizhuwang singleeventeffectmitigationstrategyfornanointegratedcircuitreinforcedlatches |