Hardware realization of neuromorphic computing with a 4–port photonic reservoir for modulation format identification - Enes Şeker; Rijil Thomas; Guillermo von Hünefeld; Stephan Suckow; Mahdi Kaveh; Gregor Ronniger; Pooyan Safari; Isaac Sackey; David Stahl; Colja Schubert; Johannes Karl Fischer; Ronald Freund; et al. (Neuromorphic Computing and Engineering)
The fields of machine learning and artificial intelligence drive researchers to explore energy-efficient, brain-inspired new hardware. Reservoir computing encompasses recurrent neural networks for sequential data processing and matches the performance of other recurrent networks with less training and lower costs. However, traditional software-based neural network (NN) require high energy due to computational demands and massive data transfer needs. A hybrid photonic–electronic reservoir computing (RC) system overcomes this challenge with neuromorphic photonic integrated circuits or NeuroPICs, combining passive photonic reservoirs with electronic readout layers. Here, we introduce a hybrid photonic–electronic RC solution for modulation format identification in C-band telecommunication network monitoring. The NeuroPIC is built on a silicon-on-insulator platform featuring a 4-port reservoir architecture. We discuss the NeuroPIC design, fabrication, experimental performance, and compare it with simulations. The system incorporates nonlinearity through a simple digital readout and achieves close to 100% accuracy in identifying quadrature amplitude modulation formats transmitted over 20 km of optical fiber at a 32 Gbaud symbol rate. The NeuroPIC performance is robust against fabrication imperfections like waveguide propagation loss, phase randomization, and delay line length variations. Experimental results surpassed simulations, attributed to enhanced ‘richness’ of signal interference in the physical system. By integrating an energy-efficient photonic analog processing with electronic readout, this hybrid system reduces the dependence on fully digital NNs, offering a pathway for high-speed temporal data processing in various applications. While system-level energy metrics require further exploration, our work highlights the potential of hybrid approaches to balance performance, fabrication tolerance, and computational efficiency in real-world applications.